Method of fabricating contact holes in high density integrated c

Details Method of fabricating contact holes in high density integrated c Method of fabricating contact holes in high density integrated c

1997-05-05

2000-03-14

Fourson, George

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438586, 438595, H01L 2128, H01L 21336, H01L 218242

Patent

active

060372117

ABSTRACT:
A method of fabricating contact holes in high density integrated circuits uses landing plugs to reduce the aspect ratio of the the node contact holes in order to improve the processing window of deep contact holes. Along with nitride spacers on the sidewalls of a transistor gate structure, polysilicon hard masks and polysilicon spacers are used as etching masks in a self-aligned contact process. In addition, the landing plugs incorporate the polysilicon spacers as part of landing plug to increase the contact area. As a result, wide contact processing windows can be achieved in high density integrated circuits.

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