Method of fabricating CMOS transistor that prevents gate...

Details Method of fabricating CMOS transistor that prevents gate... Method of fabricating CMOS transistor that prevents gate...

2007-09-11

2007-09-11

Geyer, Scott B. (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S592000, C438S659000, C438S660000, C257SE21632, C257SE21177

Reexamination Certificate

active

10994042

ABSTRACT:
Provided is a method of fabricating a CMOS transistor in which, after a polysilicon layer used as a gate is formed on a semiconductor substrate, a photoresist pattern that exposes an n-MOS transistor region is formed on the polysilicon layer. An impurity is implanted in the polysilicon layer of the n-MOS transistor region using the photoresist pattern as a mask, and the photoresist pattern is removed. If the polysilicon layer of the n-MOS transistor region is damaged by the implanting of the impurity, the polysilicon layer of the n-MOS transistor region is annealed, and a p-MOS transistor gate and an n-MOS transistor gate are formed by patterning the polysilicon layer. The semiconductor substrate, the p-MOS transistor gate and the n-MOS transistor gate is cleaned with a hydrofluoric acid (HF) solution, without causing a decrease in height of the n-MOS transistor gate.

REFERENCES:
patent: 5480830 (1996-01-01), Liao et al.
patent: 5604157 (1997-02-01), Dai et al.
patent: 5882962 (1999-03-01), Tseng et al.
patent: 6150205 (2000-11-01), Chen et al.
patent: 6165876 (2000-12-01), Yamazaki et al.
patent: 6232208 (2001-05-01), Wu et al.
patent: 6245682 (2001-06-01), Fu et al.
patent: 6348289 (2002-02-01), Couteau et al.
patent: 6503788 (2003-01-01), Yamamoto
patent: 6524902 (2003-02-01), Rhee et al.
patent: 6645799 (2003-11-01), Yamamoto
patent: 6677652 (2004-01-01), Lin et al.
patent: 2002/0042173 (2002-04-01), Takamura

Affiliated with

Also associated with

Rating

Method of fabricating CMOS transistor that prevents gate... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of fabricating CMOS transistor that prevents gate..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating CMOS transistor that prevents gate... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3759440