Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-07-13
2000-11-28
Smith, Matthew
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438267, 438211, 438288, 438263, 438264, 438574, 257315, 257316, H01L 21336
Patent
active
061534692
ABSTRACT:
An improved method of fabricating a flash memory cell is disclosed. A tunnel oxide film is formed on active regions. A first conductive film and a protective film are sequentially formed on the tunnel oxide film. The protective film on the isolation film is selectively etched, thus forming a protective film pattern on the tunnel oxide film. A sacrificial conductive film is formed on the resultant structure. The sacrificial conductive film and the first conductive film pattern are over-etched until the sidewalls and the upper surface of the protective film pattern are exposed, thereby exposing the center of the isolation film and simultaneously forming a first conductive film pattern having sloped sidewalls. With the present invention, an electrical field is prevented from being concentrated in an area between a control gate electrode and a floating gate because the floating gate have a sloped sidewall profile instead of sharp edges. Also, the recession of an isolation film between adjacent floating gates can be significantly avoided, consequently suppressing the deterioration of isolation between adjacent cells.
REFERENCES:
patent: 5661053 (1997-08-01), Yuan
patent: 5688705 (1997-11-01), Bergemont
Choi Jeong-hyuk
Lee Chan-Jo
Yun Jae-sun
Keshavan Belur
Samsung Electronics Co,. Ltd.
Smith Matthew
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