Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-11-05
2000-10-17
Dutton, Brian
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438397, 438253, 438256, 438390, 438396, 438398, 438399, 438400, H01L 218242, H01L 2120
Patent
active
061330914
ABSTRACT:
A method of fabricating a lower electrode of a capacitor. A sacrificial multilayer is formed on a semiconductor layer. The sacrificial multi-layer is a stack of alternating first and second sacrificial layers. A patterned first mask layer having a first opening above a conductive plug in the semiconductor substrate is formed on the sacrificial multi-layer. A planar spacer is formed on the sidewall of the first opening. A second mask layer is formed to fill the first opening. The planar spacer and the sacrificial multi-layer thereunder are anisotropically etched until the semiconductor substrate is exposed to form a second opening while using the first mask layer and second mask layer as a mask. The first sacrificial layers exposed by the second opening are isotropically etched to form a plurality of recesses. The second opening and the recesses are filled with a conductive material layer. Finally, the first mask layer, second mask layer, and sacrificial multi-layer are removed.
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patent: 5937306 (1999-08-01), Kim
Chen Chun-Lung
Hsiao Hsi-Mao
Lee Tong-Hsin
Wei Wen-Shan
Dutton Brian
Kebede Brook
United Microelectronics Corp.
United Silicon Inc.
Wu Charles C. H.
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