Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2003-10-29
2010-02-09
Dang, Phuc T (Department: 2892)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S259000, C438S263000, C257S314000, C257S315000
Reexamination Certificate
active
07659165
ABSTRACT:
A field effect transistor in which at least one vertically arranged semiconductor column, with a diameter in the nanometer range, is located between a source and a contact and has an annular surround of a gate contact with retention of an insulation gap. A simplified production method is disclosed and the transistor produced thus is embodied such that the semiconductor columns are embedded in a first and a second insulation layer, between which a metal layer, running to the outside as a gate contact, is arranged, the ends of which, extending upwards through the second insulation layer, are partly converted into an insulator, or removed and replaced by an insulation material.
REFERENCES:
patent: 6379569 (2002-04-01), Rouberol
patent: 6465806 (2002-10-01), Kubota et al.
patent: 6515325 (2003-02-01), Farnworth et al.
patent: 6753546 (2004-06-01), Tzalenchuk et al.
patent: 7176620 (2007-02-01), Tsujimura et al.
patent: 7259023 (2007-08-01), Kuo et al.
patent: 2002/0001905 (2002-01-01), Choi et al.
patent: 2003/0132461 (2003-07-01), Roesner et al.
patent: 19846063 (2000-04-01), None
patent: 100 36 897 (2002-01-01), None
patent: 10036897 (2002-01-01), None
patent: 2222306 (1990-02-01), None
Engelhardt R. et al.: Growth of Compound Semiconductors in Nanometer Sized Channels of Polymers; Mat.Res.Soc.Symp.Proc. vol. 672 (2201) pp. 08.8.1-O8.8.6.
Seung Chul Lyu et al. “Low-Temperature Growth of ZnO Nanowire Array by a Simple Physical Vapor-Deposition Method”, Chem. Mater., 2003, 15 (17), pp. 3294-3299.
K.B.K Teo et at “PECVD Carbon Nanotubes/Nanofibers - How uniform do they grow?”, TNT2002, Sep. 9-13, 2002, Santiago de Compostela-Spain, (2 pages).
R. Engelhardt and R. Koenenkamp, “Electrodeposition of Compound Semiconductors in Polymer Channels of 100 nm Diameter”, J. Appl. Phys., vol. 90, No. 8, Oct. 15, 20.01, pp. 4288-4289.
Mark S. Gudiksen et al. “Diameter-Selective Synthesis of Semiconductor Nanowires”, J. Am. Chem. Soc., 2000, 122 (36), pp. 8801-8802.
R. Koenenkamp et al. “Thin film semiconductor deposition on free-standing ZnO columns”, Applied Physics Letters, vol. 77, No. 16, 16 Oct. 2000, pp. 2575-2277.
Dang Phuc T
Darby & Darby
Helmholtz-Zentrum Berlin fuer Materialien und Energie GmbH
LandOfFree
Method of fabricating a field effect transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of fabricating a field effect transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating a field effect transistor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4212646