Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2011-07-12
2011-07-12
Smith, Matthew (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S282000, C257S412000, C257SE29242
Reexamination Certificate
active
07977187
ABSTRACT:
A semiconductor device includes a semiconductive channel region and a gate region. The gate region has at least one buried part extending under the channel region. The buried part of the gate region is formed by forming a cavity under the channel region. That cavity is at least partial filled with silicon and a metal. An annealing step is performed so as to form a silicide of said metal in the cavity. The result is a totally silicided buried gate for the semiconductor device.
REFERENCES:
patent: 4803539 (1989-02-01), Psaras et al.
patent: 5004705 (1991-04-01), Blackstone
patent: 6661044 (2003-12-01), Jang
patent: 6787425 (2004-09-01), Rotondaro et al.
patent: 6864129 (2005-03-01), Risch et al.
patent: 7361545 (2008-04-01), Li et al.
patent: 2003/0054637 (2003-03-01), Yang
patent: 2004/0124468 (2004-07-01), Coronel et al.
patent: 2004/0227181 (2004-11-01), Yeo et al.
patent: 2004/0262690 (2004-12-01), Coronel et al.
patent: 2005/0029603 (2005-02-01), Yu et al.
patent: 2005/0121703 (2005-06-01), Hieda et al.
patent: 2005/0176186 (2005-08-01), Lee et al.
patent: 2005/0224889 (2005-10-01), Oh et al.
patent: 2005/0266645 (2005-12-01), Park
patent: 2006/0024874 (2006-02-01), Yun et al.
patent: 2007/0048938 (2007-03-01), Yun et al.
patent: 2007/0181959 (2007-08-01), Park et al.
patent: 2007/0284670 (2007-12-01), Yamamoto et al.
patent: 2009/0134470 (2009-05-01), Yang
patent: 2009/0315182 (2009-12-01), Besser et al.
patent: 199 28 564 (2001-01-01), None
patent: 2 853 454 (2004-10-01), None
patent: 2006278369 (2006-10-01), None
French Search Report, FR 08 51266, dated Oct. 27, 2008 (2 pages).
Bernard Emilie
Coronel Philippe
Guillaumot Bernard
Fan Michele
Gardere Wynne & Sewell LLP
Smith Matthew
STMicroelectronics (Crolles 2) SAS
STMicroelectronics S.A.
LandOfFree
Method of fabricating a buried-gate semiconductor device and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of fabricating a buried-gate semiconductor device and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating a buried-gate semiconductor device and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2648985