Method of doping polysilicon layer that utilizes gate...

Details Method of doping polysilicon layer that utilizes gate... Method of doping polysilicon layer that utilizes gate...

2007-04-23

2010-11-16

Smoot, Stephen W (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S491000, C438S532000, C438S591000, C257SE21267

Reexamination Certificate

active

07833864

ABSTRACT:
Embodiments prevent or substantially reduce diffusion of a P-type impurity into a channel region in a PMOS transistor having a dual gate. Some embodiments include forming a device isolation film on a semiconductor substrate, forming a channel impurity region in an active region of the semiconductor substrate, and forming a gate insulation layer including a silicon oxide layer and a silicon oxide nitride layer on the semiconductor substrate. Also, the embodiments can include forming a polysilicon layer containing an N-type impurity on the gate insulation layer, and forming a gate electrode by selectively ion-implanting a P-type impurity into the polysilicon layer formed in a PMOS transistor region of the circuit region. The embodiments further include forming a conductive metal layer and a gate upper insulation layer on the gate electrode, and forming a gate stack in a gate region.

REFERENCES:
patent: 6001677 (1999-12-01), Shimizu
patent: 6030874 (2000-02-01), Grider et al.
patent: 6184110 (2001-02-01), Ono et al.
patent: 6198121 (2001-03-01), Sung et al.
patent: 6387784 (2002-05-01), Chong et al.
patent: 6413881 (2002-07-01), Aronowitz et al.
patent: 6432780 (2002-08-01), Chen
patent: 6489210 (2002-12-01), Sohn et al.
patent: 6566281 (2003-05-01), Buchanan et al.
patent: 6657244 (2003-12-01), Dokumaci et al.
patent: 2002/0001899 (2002-01-01), Ito
patent: 2002/0068405 (2002-06-01), Ono
patent: 2003/0057499 (2003-03-01), Yamamoto et al.
patent: 2003/0092249 (2003-05-01), Hsu et al.
patent: 2004/0002226 (2004-01-01), Burnham et al.
patent: 2004/0004247 (2004-01-01), Forbes et al.
patent: 100266690 (2000-06-01), None
patent: 20020002155 (2002-01-01), None
Korean Office Action dated Sep. 22, 2005 issued in KR Application No. 2003-0057836.

Affiliated with

Also associated with

Rating

Method of doping polysilicon layer that utilizes gate... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of doping polysilicon layer that utilizes gate..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of doping polysilicon layer that utilizes gate... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4169528