Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Patent
1998-10-08
2000-09-26
Chung, Phung M.
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
G11C 2900
Patent
active
061254606
ABSTRACT:
A method for testing a semiconductor device having a logic, a nonvolatile memory and a code generator for generating a code in response to the output of the nonvolatile memory is provided. The method includes the steps of loading a program, generating a code, inputting the code, testing the nonvolatile memory, comparing, checking the test response, revising the test program, and testing the semiconductor device. Specifically, the test program is loaded on the tester. Then a code is generated from memory data stored in the nonvolatile memory, and the code is input into the tester. The nonvolatile memory of the semiconductor device is tested, and the test response output from the code generator is stored in a predetermined memory of the tester. The test response is compared with the code, and the code is replaced by the test response if the test response and the code are the same with each other. Then, the test responses for obtaining the test response having a high level of precision is checked by comparing the test response with each other several times. The test program is revised by incorporating the test response into the test program. The semiconductor device is tested using the revised test program.
REFERENCES:
patent: 5357519 (1994-10-01), Martin et al.
patent: 6032281 (2000-02-01), Fujisaki
Chung Phung M.
Samsung Electronics Co,. Ltd.
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