Method for testing semiconductor chips using register sets

Details Method for testing semiconductor chips using register sets Method for testing semiconductor chips using register sets

2005-11-29

2008-11-18

Trimmings, John P (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S005110, C714S025000, C714S030000, C714S042000, C714S709000, C714S715000, C714S718000, C714S719000, C714S720000, C714S722000, C714S724000, C714S727000, C714S728000, C714S729000, C714S733000, C714S734000, C714S736000, C714S738000, C714S739000, C714S742000, C714S745000, C365S201000

Reexamination Certificate

active

07454676

ABSTRACT:
A method for testing semiconductor chips having a test logic unit includes: providing a chip having n different register sets, each of which has m different registers that are subdivided into m register groups each having n registers, each register group respectively having only one individual register from a register set, the m register groups being uniquely identifiable using m headers; programming the m different register groups by filling them with m first bit strings, each bit string being respectively assignable to a state of n test modes; transmitting at least one header to select a register group and the state of the n test modes and executing the state of n test modes stored in the selected register group; and using a serial second bit string to read out test results or the status of the test modes.

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