Method for scan testing and clocking dynamic domino circuits...

Details Method for scan testing and clocking dynamic domino circuits... Method for scan testing and clocking dynamic domino circuits...

2006-02-14

2006-02-14

Tu, Christine T. (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C713S400000

Reexamination Certificate

active

07000164

ABSTRACT:
A system and method is provided for scan control and observation of a logical circuit that does not halt the operation of the system clock. Thus, all dynamic circuits within the system continue to evaluate and precharge normally. Moreover, the traditional method of placing a multiplexer before the data input of a clocked storage element to perform scan control and observation is no longer required. Consequently, the system and method provide a more efficient manner in which to perform scan control and observation of a logical circuit.

REFERENCES:
patent: 6452426 (2002-09-01), Tamarapalli et al.
patent: 6763489 (2004-07-01), Nadeau-Dostie et al.
patent: 2003/0084390 (2003-05-01), Tamarapalli et al.
patent: 2003/0106003 (2003-06-01), Whetsel
Abramovici, M. et al. “Design for testability” inDigital systems testing and testable design, 368-381 (1990).

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