Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-01-04
2005-01-04
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S303000, C438S305000, C438S585000
Reexamination Certificate
active
06838347
ABSTRACT:
A method for reducing line edge roughness (LER) of a semiconductor gate structure includes patterning a photoresist layer formed over an oxide hardmask layer. The photoresist layer is etched so as to transfer a photoresist pattern to the oxide hardmask layer, the photoresist pattern having an initial LER. The exposed surfaces of the oxide hardmask are etched with a chemical oxide removal (COR) so as to form a reaction product on the exposed surfaces, wherein concave portions of the exposed surfaces are etched at a reduced rate with respect to convex portions of the exposed surfaces.
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Liu Joyce C.
Natzle Wesley C.
Wise Richard S.
Yan Hongwen
Zhang Bidan
Cantor & Colburn LLP
Cioffi James J.
International Business Machines - Corporation
Lindsay Jr. Walter L.
Niebling John F.
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