Method for producing shallow trench isolation structure

Details Method for producing shallow trench isolation structure Method for producing shallow trench isolation structure

1998-11-27

2000-08-15

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438404, 438424, H01L 2176

Patent

active

061035815

ABSTRACT:
A method for fabricating shallow trench isolation stricture wherein a surface oxide layer and a polycrystalline silicon buffer layer are formed on a semiconductor body. Openings are formed through the layers and into the body that constitute trenches. A lining oxide layer is formed on the trench and buffer layer surfaces. A thick oxide layer is deposited on the body to fill the trench, and the layer planarized by chemical-mechanical polishing. The exposed portions of the buffer layer are removed and the horizontal surface oxide layer portions removed by anisotropic etching.

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patent: 5930646 (1999-07-01), Gerung et al.
patent: 6022789 (2000-02-01), Takase

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