Method for preventing trenching in fabricating split gate...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S258000, C438S259000, C438S255000, C438S264000, C438S266000, C438S267000, C438S424000, C257S315000, C257S319000, C257SE21177

Reexamination Certificate

active

07144773

ABSTRACT:
A method for forming a split gate flash device is provided. In one embodiment, a semiconductor substrate with a dielectric layer formed thereover is provided. A conductor layer is formed overlying the dielectric layer. A masking layer is deposited overlying the conductor layer. A light sensitive layer is formed overlying the masking layer. The light sensitive layer is patterned and etched to form a pattern of openings therein. The masking layer and the conductor layer are etched according to the pattern of openings in the light sensitive layer. The conductor layer is etched at the outer surface area between the conductor layer and the dielectric layer to form undercuts. The dielectric layer is etched to form a notch profile at the outer surface area between the conductor layer and the dielectric layer and portions of the substrate are etched to form a plurality of trenches. An isolation layer is filled over the plurality of trenches and the masking layer. The masking layer and portions of the conductor layer and isolation layer are etched away, wherein a portion of the isolation layer is preserved in the notch profile.

REFERENCES:
patent: 2003/0124800 (2003-07-01), Park et al.
patent: 2003/0203571 (2003-10-01), Rabkin et al.
patent: 2004/0241942 (2004-12-01), Hsieh

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