Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2001-06-01
2002-09-24
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S303000, C438S592000
Reexamination Certificate
active
06455389
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method for preventing by-product ions moving from a spacer, and particularly relates to the method for preventing by-products ions moving from a spacer to other regions by using an offset liner, a liner ,whose surface is treated, and a spacer, which is formed by using the atomic layer deposition method or the raped thermal chemical vapor deposition method. The by-product ions, which is in the spacer, will be fixed in the spacer region to increase the voltage stability of the semiconductor device after the current is connected, and further to increase qualities of the semiconductor device.
2. Description of the Prior Art
In general, when a spacer is formed over the polysilicon gate, most used material of the spacer is an in insulating material to decrease the probability of occurring, electric leakage defects in the polysilicon gate. The liner is usually formed outside of the polysilicon gate to increase the combined ability between the spacer and the polysilicon gate and to prevent the electric leakage and stress defects occurring in the polysilicon gate. The most used insulating material of the spacer is silicon nitride and the combined ability between silicon nitrate and polysilicon is very low. Therefore, of a liner is not formed outside of the poluysilicon gate, a vacant space is usually formed between the polysilicon gate and the spacer to affect the qualities of the semiconductor elements.
The objective of the liner is used to be an interface between the polysilicon gate and the spacer to increase the combined qualities at the place which is between the polysilicon gate and the spacer. This condition can prevent the electric leakage and stress defects occurring in the polysilicon gate. Therefore, the material of the liner must have finer combined ability with the polysilicon gate and the spacer to reach its efficiency.
In general, the most used material of the liner is silicon dioxide, because silicon dioxide has a finer combined ability with the polysilicon gate and the spacer. The traditional method for forming the silicon dioxide layer to be the liner over the polysilicon gate is to use the thermal oxide process. At first, a wafer that comprises a decided dimension polysilicon gate on the substrate is placed into the chamber of the furnace. When the temperature of the chamber reaches to about 700° C., oxygen is transported. In the process, the oxygen atoms permeate to the surface of the polysilicon gate and react to become a silicon dioxide thin layer to be the liner. Then a silicon nitride layer is formed on the liner by using a furnace process. At last, the spacer is obtained by using an etching process to remove partial silicon nitride layer.
In the forming spacer process, silane (SiH
4
) or dichloride silane (SiH
2
Cl
2
) will be used to react with ammonia (NH
3
) to form silicon nitride to be the spacer by using the furnace process or the rapid thermal chemical vapor deposition (RTCVD) process. In the furnace process, the temperature of the chamber is about 680 to 780° C. and the pressure of the chamber is about 20 to 60 pascal (Pa). The proceeding time of the furnace process is about 2 to 6 hours. In the rapid thermal chemical vapor deposition process, the temperature of the chamber is about 650 to 700° C. and the pressure of the chamber is about 200 to 600 torr. The proceeding time of the rapid thermal chemical vapor deposition process is about 2 to 4 minutes. In the chemical reaction process, the by-product, such as hydrogen (H
2
) and hydrochloric (HCl), will be generated following the chemical reaction. These by-product particles will become the ions, whose kinetic energy is higher, in the high temperature environment to move to other regions by using the actions in diffusion or draft. When these ions move to the region, under the gate, the ions will easily react with the impurities, which, and will stay under the gate. When the current is connected with the semiconductor device, the short channel effects will be easily found at the region, which is under the gate to affect the voltage stability of the semiconductor device. This defect will further affect the efficiency and the quality of the semiconductor device. Among the by-product particles, the hydrogen ion in particular causes the most serious effects. Therefore, the present invention method must be used, decrease the temperature of the spacer forming process and thus reduce the amount of by-product ions within the spacer. This condition can prevent the by-product ions from moving to other regions within the spacer and avoid the effects in voltage stability of the semiconductor device.
Although the temperature of the forming spacer process is decreased, the back-end process of the semiconductor will still need the high temperature process to conform to the needs of the entire process. Traditional silicon dioxide liners, formed by using the thermal oxide method, although can combine the polysilicon gate and spacer successfully to prevent the electric leakage and stress defects occurring in the polysilicon gate. This silicon dioxide liner can not resist the by-product ions, which are in the spacer, passing through this liner and moving to the region, which is under the gate, by the actions in diffusion and drift in the high temperature environment to affect the voltage stability of the semiconductor device.
SUMMARY OF THE INVENTION
In accordance with the background of the above-mentioned invention, the traditional method cannot reduce the amount of by-product ions in the spacer and cannot prevent the by-product ions from moving to other regions which affect the voltage stability after the current is connected to the semiconductor device. The main objective of the present invention is to prevent the by-product ions that are in the spacer from moving to other regions by using an offset liner, a liner, whose surface is treated, and a spacer, which is formed by using the atomic layer deposition method or the rapid thermal chemical vapor deposition method.
The second objective of this invention is to reduce the thermal budget of the spacer process by using an offset liner, a liner, whose surface is treated, and a spacer, which is formed by using the atomic layer deposition method or the rapid thermal chemical vapor deposition method.
The third objective of this invention is to increase the voltage stability of the semiconductor device after the current is connected to the semiconductor device by using an offset liner, a liner, whose surface is treated, and a spacer, which is formed by using the atomic layer deposition method or the rapid thermal chemical vapor deposition method.
The fourth objective of this invention is to increase the quality of the semiconductor device by using an offset liner, a liner, whose surface is treated, and a spacer, which is formed by using the atomic layer deposition method or the rapid thermal chemical vapor deposition method.
It is a further objective of this invention to reduce the cost of production by using an offset liner, a liner, whose surface is treated, and a spacer, which is formed by using the atomic layer deposition method or the rapid thermal chemical vapor deposition method.
In according to the foregoing objectives, the present invention provides a method to prevent by-product ions from moving from the spacer to other regions by using an offset liner, a liner, whose surface is treated, and a spacer, which is formed by using the atomic layer deposition method or the rapid thermal chemical vapor deposition method. The present invention can also increase the voltage stability and the quality of the semiconductor device after the current is connected to the semiconductor device. The present invention can further increase the yield of the product, reduce cost of the production, and increase the efficiency of the process.
REFERENCES:
patent: 4799745 (1989-01-01), Meyer et al.
patent: 6235600 (2001-05-01), Chiang et al.
patent: 6255175 (2001-07-01), Yu
patent: 6271096 (2001-08-01), Jan et
Cheng Li-Wei
Huang Kuo-Tai
Lin Chao-Sheng
Lindsay Jr. Walter L.
Niebling John F.
Powell Goldstein Frazer & Murphy LLP
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