Method for preparing semiconductor including formation of...

Details Method for preparing semiconductor including formation of... Method for preparing semiconductor including formation of...

2001-11-29

2003-11-25

Zarabian, Amir (Department: 2822)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S253000, C438S396000, C438S639000, C438S640000, C438S696000, C438S713000, C438S714000, C438S723000, C438S725000

Reexamination Certificate

active

06653228

ABSTRACT:

CROSS REFERENCE
This application claims the benefit of Korean Patent Application No. 2000-71705, filed on Nov. 29, 2000, under 35 U.S.C. §119, the entirety of which is hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for preparing a semiconductor, more particularly, relates to a method for forming a contact hole using a CH
2
F
2
gas that is capable of preventing a photoresist mask from losing a side wall of the mask by forming a polymer layer having a predetermined depth on the upper portion and side wall of the photoresist.
2. Description of Related Art
Methods of forming highly integrated semiconductor devices of a layered type are known. In order to insulate each of the layered devices, a layered insulator is formed.
As can be seen, in the conventional method for forming a bit line of a semiconductor device, the properties of the semiconductor device deteriorate due to void formation between the bit lines and also due to the presence of etching residue at the contact etching.
A process of forming a contact hole in a semiconductor device also becomes difficult due to increasing the aspect ratio and decreasing the thickness of the photoresist used in the process. Furthermore, the aspect ratio is decreased due to decreasing the area of the photoresist because the space between the contact holes becomes narrow. As the aspect ratio is decreased, an open portion is opened due to damage to the contact upper portion.
And, in the case of etching the anti-reflection layer (ARL) formed on the upper portion of the oxide, when a non-uniformly formed polymer layer is used in etching the successive oxide layer, a striation occurs because the non-uniformities in the polymer layer are transcripted (FIGS.
2
A and
2
B).
Moreover, as shown in
FIG. 2A
, the striation occurring in the state of after develop inspection (ADI) is accelerated by washing the oxide before the subsequent doping of silicon (Si), and the bridge occurs after the separation of the storage nodes as shown in FIG.
2
B.
FIGS. 1A
to
1
C are cross sectional drawings of a contact hole of a semiconductor formed according to a conventional process disclosed in Korean Patent Application No. 1997-77894.
According to this process, in the Korean Patent, an interlayer insulation layer is etched using CO, CCl
4
comprising carbon components as main gases in order to form a contact hole. At this time, the carbon components are reacted with the etchant gas and a polymer (Si—C bond) comprising rich carbons when etching the interlayer insulation layer.
FIGS. 1A
to
1
C are cross-sectional drawings of forming a contact hole of a semiconductor device according to a conventional art.
First, as shown in
FIG. 1A
, a field oxide layer is formed on an upper portion of the semiconductor (
11
) and a field region and a device forming region are separated. A gate oxide layer (not shown), a polysilicon (
13
) and an insulation layer (
15
) are sequentially layered on the upper portion of the device forming region and the polysilicon (
13
), the insulation layer (
15
) and the gate oxide layer are etched. And, an insulation spacer (
15
′) is formed on both sides of a structure having the polysilicon (
13
) and the insulation layer (
15
)
Next, an etching process is performed using an etchant gas that comprises CO, CCl
4
as main gases and Ar, N
2
, He, etc., and a carbon component is injected into the insulation spacer (
15
′) and the insulation layer (
15
)
Next, as shown in
FIG. 1B
, an etching mask pattern (
150
) is formed in order to form the contact hole after forming the interlayer insulation layer.
Next, as shown in
FIG. 1C
, the interlayer insulation layer is etched using the etching mask pattern (
150
) and, at this time, the etching process uses CF
4
, CHF
3
, C
2
F
6
, C
3
F
8
, C
4
F
8
, CH
2
F
2
and NF
3
gases.
The carbon components injected into the insulation spacer (
15
′) and the insulation layer (
15
) are reacted with the etchant gas and a polymer (SiC bonds) comprising rich carbon is formed.
Because the polymer comprising rich carbon quite reduces an etching rate of the insulation spacer (
15
′) and the interlayer insulation layer (
15
), as shown in
FIG. 1C
, a portion of “A” remains.
Subsequently, an insulation spacer (
151
) is formed in the contact hole and a conductive pattern is formed in the semiconductor (
11
).
There are problems that the method performs two etching processes in order to form the contact hole and the process is complicated because of using different etchant gases in each etching process.
For the foregoing reasons, there is a need for a method for preparing a semiconductor device in which damage to the contact hole upper portion due to a loss of the side wall of the mask is prevented.
SUMMARY OF THE INVENTION
In accordance with one respect of the present invention, there is provided a method of forming a contact hole in a semiconductor device that includes the steps of: forming a polymer layer on an upper portion and a side wall of photo resist mask, while etching an oxide layer under the photoresist mask to form a contact hole that uses an etchant gas comprising CH
2
F
2
gas and etching the oxide layer while stopping the supply of CH
2
F
2
gas to the etching process.
Semiconductor devices produces according to the inventive methods are also provided.


REFERENCES:
patent: 5681773 (1997-10-01), Tseng
patent: 5719089 (1998-02-01), Cherng et al.
patent: 5904154 (1999-05-01), Chien et al.
patent: 5942803 (1999-08-01), Shim et al.
patent: 6214747 (2001-04-01), Chou et al.
patent: 6492279 (2002-12-01), Becker et al.
patent: 3-019220 (1991-01-01), None
patent: 97-77894 (1997-12-01), None
patent: 10 2000 0045339 (2000-07-01), None

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