Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
1999-08-30
2001-10-09
Clark, Sheila V. (Department: 2815)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
C438S127000, C257S187000, C257S676000
Reexamination Certificate
active
06300166
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for packaging a Ball Grid Array (BGA), and more particularly to a method that uses a mold to package a BGA. With this arrangement and structure of the BGA, the production efficiency and the heat dissipation effect will increase dramatically.
2. Description of Related Art
Referring to
FIG. 5
, a conventional substrate (
80
) for packaging a Ball Grid Array is shown. The substrate (
80
) has slots (
801
) defined therein. A layer of tape (
81
) is provided around each of the slots (
801
) to secure the chip (not shown). After the chip is securely bonded to the substrate (
80
) by means of the gel on the tape (
81
), the process of wire bonding is then ready to be performed to complete the package. A shown in
FIG. 6
, each of the chips (
82
) securely bonded to the substrate (
80
) has a line of pads (
820
) securely mounted thereunder. The line of the pads (
820
) corresponds to one of the slots (
801
). Thereafter, metal wires (
821
) are bonded to connect the pads (
820
) with the substrate (
80
).
After the process of wire bonding is completed, the process of packaging is initiated. The aforementioned BGA components are packaged by gel (
84
) spread around each one of the chips (
82
) and filled in the slots (
801
), so as that the chips (
82
) are protected from damage by the solidified gel (
84
). Then solder balls (
83
) are provided under the substrate (
80
) to connect with the circuit of the substrate (
80
) so as to form a bare-chip Ball Grid Array.
The above description depicts the basic structure of the bare-chip BGA. However, such a structure suffers from a number of shortcomings:
1. low production efficiency
Since the distribution of the gel (
84
) is labor intensive, the time required to complete the BGA package is excessive, which results in low production efficiency.
2. insufficient protection
The bare-chip BGA chips (
82
) are only protected by the solidified gel (
84
). The protection to the chips (
82
) provided by the gel (
84
) is not sufficient to avoid damage to the chips (
82
).
3. low heat dissipation efficiency
The heat dissipation of this bare-chip BGA depends only on the exposed surfaces of the chips (
82
), which are in contact with the air. As for the dissipation of the extra heat, the bare-chip BGA will not be able to dissipate the heat effectively.
It is therefore an objective of the invention to provide a method for packaging the BGA and the structure of the substrate for accomplishing the packing.
The present invention intends to provide a method for packaging a BGA and the structure of the substrate to accomplish the packaging to mitigate and/or obviate the aforementioned problems.
SUMMARY OF THE INVENTION
The main objective of the invention is to provide a method for packaging a BGA. With such a method, the process of packaging the BGA can be completed quickly, and the chips that are securely mounted on the substrate are able to be well protected.
Another objective of the invention is to increase the heat dissipation effectiveness of the packaged BGA. Because the chips on the substrate are fully covered by the gel and the solidified gel effectively conducts and radiates heat, the total heat dissipation surface of the packaged BGA increases, which increases the total heat dissipation capability.
Still, another objective of the invention is to provide an improved method for packaging the substrate. The substrate has multiple aligned slots parallel with each other and a passage corresponding to each of the aligned slots. With such an arrangement, the chips mounted on the substrate are protected by the gel flowing from the inlet of an upper mold. Furthermore, the pads and the bonding wires mounted underneath the substrate are able to covered by the gel flowing into the slots in the lower mold.
REFERENCES:
patent: 5834837 (1998-11-01), Song
patent: 6013947 (2000-01-01), Lim
patent: 6025640 (2000-02-01), Yagi et al.
Chung Chin-Ming
Lin Meng-Hui
Tao Su
Tsai Yu-Ching
Advanced Semiconductor Engineering Inc.
Clark Sheila V.
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