Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2011-08-09
2011-08-09
Richards, N Drew (Department: 2895)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257S344000
Reexamination Certificate
active
07994016
ABSTRACT:
A method of forming ultra-shallow p-type lightly doped drain (LDD) regions of a PMOS transistor in a surface of a substrate includes the steps of providing a gaseous mixture of an inert gas, a boron-containing source, and an optional carbon-containing source, wherein the concentration of the gaseous mixture is at least 99.5% dilute with the inert gas and the optional carbon-containing source, if present, forming the gaseous mixture into a plasma, and forming the LDD regions, wherein the forming step includes plasma-doping the boron into the substrate using the plasma. N-type pocket regions are formed in the substrate underneath and adjacent to the LDD regions, wherein for a PMOS transistor having a threshold voltage of 100 mV, the n-type pocket regions include phosphorous impurities at a dopant concentration of less than 6.0×1018atoms/cm3or a proportionately lower/higher dopant concentration for a lower/higher threshold voltage.
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Chan Chien-Tai
Lin Da-Wen
Nieh Chun-Feng
Tsai Chun-Hsiung
Carpenter Robert
Duanc Morris LLP
Powers Joseph A.
Richards N Drew
Taiwan Semiconductor Manufacturing Co. Ltd.
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