Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-10-08
1999-10-26
Bowers, Charles
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438224, 438227, 438448, H01L 218238
Patent
active
059727462
ABSTRACT:
The invention provides an isolation technique using fewer process steps and a double charged implantation step (141) for defining a well region (139) of a CMOS integrated circuit device. The invention provides steps of providing a semiconductor substrate comprising an multiple layer of films (105, 107, 109). These films include an oxide layer (105) overlying the substrate, a polysilicon layer (107) overlying the oxide layer, and a nitride layer (109) overlying the polysilicon layer. The invention also uses a step of removing a first portion of the nitride layer and a first portion of the polysilicon layer defined underlying the first portion of the nitride layer and removing a second portion of the nitride layer and a second portion of the polysilicon layer defined underlying the second portion of the nitride layer. This sequence of steps provides a partially completed semiconductor structure that defines isolation regions before forming well regions for active devices.
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Chang San-Jung
Chen Min-Liang
Pittikoun Saysamone
Wang Chih-Hsien
Bowers Charles
Chen Jack
Mosel Vitelic Inc.
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