Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-03-29
2005-03-29
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257S369000
Reexamination Certificate
active
06872613
ABSTRACT:
According to one exemplary embodiment, a method for integrating first and second metal layers on a substrate to form a dual metal NMOS gate and PMOS gate comprises depositing a dielectric layer over an NMOS region and a PMOS region of the substrate. The method further comprises depositing the first metal layer over dielectric layer. The method further comprises depositing the second metal layer over the first metal layer. The method further comprises implanting nitrogen in the NMOS region of substrate and converting a first portion of the first metal layer into a metal oxide layer and converting a second portion of the first metal layer into metal nitride layer. The method further comprises forming the NMOS gate and the PMOS gate, where the NMOS gate comprises a segment of metal nitride layer and the PMOS gate comprises a segment of the metal oxide layer.
REFERENCES:
patent: 6027961 (2000-02-01), Maiti et al.
patent: 6492217 (2002-12-01), Bai et al.
Goo Jung-Suk
Holbrook Allison K.
Jeon Joong S.
Kluth George J.
Xiang Qi
Advanced Micro Devices , Inc.
Farjami & Farjami LLP
Vu David
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