Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-02-19
1999-04-13
Dutton, Brian
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
H01L 21336
Patent
active
058940650
ABSTRACT:
A method for improving the intermediate dielectric profile, particularly for non-volatile memories constituted by a plurality of cells, including the following steps: forming field oxide regions and drain active area regions on a substrate; forming word lines on the field oxide regions; depositing oxide to form oxide wings that are adjacent to the word lines; opening, by masking, source regions and the drain active area regions, keeping the field oxide regions that separate one memory cell from the other, inside the memory, covered with resist; and removing field oxide in the source regions and removing oxide wings from both sides of the word lines.
REFERENCES:
patent: 5087584 (1992-02-01), Wada et al.
patent: 5256584 (1993-10-01), Hartmann
patent: 5330924 (1994-07-01), Huang
European Search Report from European Patent Application 96830086.3, filed Feb. 28, 1996.
Brambilla Claudio
Cereda Manlio Sergio
Daffra Stefano
Ginami Giancarlo
Ravaglia Andrea
Dutton Brian
SGS--Thomson Microelectronics S.r.l.
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