Method for forming multiple gate oxide thickness utilizing...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S275000, C438S591000, C438S788000, C438S981000, C134S001300

Reexamination Certificate

active

07041562

ABSTRACT:
Embodiments of the present invention relate to semiconductor structures having multiple gate dielectric structures. One embodiment forms semiconductor devices in multiple regions having different dielectric thicknesses where the interface between the gate dielectric and the semiconductor substrate is protected to result in an improved (e.g. less rough) interface. One embodiment includes forming a dielectric layer overlying a substrate, partially etching the dielectric layer in at least one of the multiple regions, and ashing the dielectric layer. The remaining portion of the dielectric layer (due to the partial etch) may then help protect the underlying substrate from damage during a subsequent preclean. Afterwards, in one embodiment, the gate dielectric layer is grown to achieve a target gate dielectric thickness in at least one of the regions. This may also help further densify the gate dielectric layer. Processing may then be continued to form semiconductor devices in each of the multiple regions.

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H. Lim et al., The Effects of STI Process Parameters on the integrity of Dual Gate Oxides. IEEE 2001, pp. 48-51.

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