Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Multiple layers
Patent
1997-05-01
1999-03-09
Bowers, Charles
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Multiple layers
438763, 438760, 438624, 438631, 438633, 438692, 438698, H01L 2102
Patent
active
058800395
ABSTRACT:
A method for forming an interlayer insulating film of semiconductor device is disclosed. A first interlayer insulating film is deposited on the entire top surface of a semiconductor device comprising a high step cell area and lower step periphery area, followed by the thermal treatment thereof. A second interlayer insulating film which is more resistant to etch than the first interlayer insulating film is deposited. Again, a third interlayer insulating film is deposited over the second interlayer insulating film, followed by the heat treatment thereof. These interlayer insulating films are planarized by a CMP process. Upon the CMP process, the first interlayer insulating film is rapidly etched out while the second interlayer insulating film is slowly removed and this difference in etching rate allows the polishing end point to be readily detected without an additional detector. Thus, the lower step periphery area can be prevented from being over-polished, so that a wholly planar structure free of the dishing problem can be obtained, thus facilitating the subsequent processes.
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Bowers Charles
Hyundai Electronics Industries Co,. Ltd.
Nath Gary M.
Nguyen Thanh
Novick Harold L.
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