Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2004-08-03
2010-02-16
Luu, Chuong A. (Department: 2892)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S591000, C438S758000, C438S787000
Reexamination Certificate
active
07662683
ABSTRACT:
Provided is a method for forming a gate dielectric layer, in which a plasma oxide layer is finely formed by plasma at a temperature of 200° C. or below, and an atomic layer deposition (ALD) oxide layer is deposited. Further, the gate dielectric layer according to the present invention can be applied to a display device comprising a substrate such as a plastic substrate vulnerable to heat, have good interfacial characteristic, and allow a high dielectric layer to be applied thereto.
REFERENCES:
patent: 6284580 (2001-09-01), Takehiro
patent: 6395650 (2002-05-01), Callegari et al.
patent: 6448192 (2002-09-01), Kaushik
patent: 6573193 (2003-06-01), Yu et al.
patent: 6699725 (2004-03-01), Lee
patent: 6940114 (2005-09-01), Oh et al.
patent: 6998317 (2006-02-01), Ono
patent: 7153744 (2006-12-01), Chen et al.
patent: 7423286 (2008-09-01), Handy et al.
patent: 2004/0004244 (2004-01-01), Ahn et al.
patent: 2004/0082171 (2004-04-01), Shin et al.
patent: 2004/0094808 (2004-05-01), Joshi et al.
patent: 2005/0181535 (2005-08-01), Yun et al.
patent: 04-043642 (1992-02-01), None
patent: 2002-01337 (2002-01-01), None
patent: 1020020001337 (2002-01-01), None
patent: 2003-50678 (2003-06-01), None
Yong Woo Choi, et al.; “Effects of inductively coupled plasm oxidation on the properties of poly crystalline silicon films and thin film transistor”; Applied Physics Letters; vol. 74, No. 18; May 3, 1999; pp. 2693-2695.
Lee Jin Ho
Lim Jung Wook
Yun Sun Jin
Electronics and Telecommunications Research Institute
Lowe Hauptman & Ham & Berner, LLP
Luu Chuong A.
LandOfFree
Method for forming gate dielectric layer does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for forming gate dielectric layer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for forming gate dielectric layer will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4218263