Method for forming contact holes of semiconductor memory device

Details Method for forming contact holes of semiconductor memory device Method for forming contact holes of semiconductor memory device

1998-05-28

2001-06-19

Niebling, John F. (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S424000, C438S359000, C438S700000

Reexamination Certificate

active

06248636

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a method for fabricating a semiconductor memory device, and more particularly to a method for forming contact holes of a semiconductor memory device.
BACKGROUND OF THE INVENTION
FIG. 1
shows a lay-out of a conventional semiconductor memory device. A word line
100
is arranged perpendicularly to an active region
200
. A contact hole
300
for a lower capacitor electrode and a contact hole
400
for a bit line are each formed between word lines. During formation of the contact holes
300
and
400
, misalignment can cause deviation of the contact holes from active regions
200
. Because of such deviation, a silicon substrate
1
can be over-etched more than necessary during the formation of the contact holes
7
and
7
a
(i.e., during etching of a very thick interlayer insulating layer
5
) as shown by dotted circles A and A′ of
FIGS. 2 and 3
. If the over-etching reaches a well region (e.g., silicon region) of silicon substrate
1
, a lower capacitor electrode or a bit line to be formed by following process steps is short-circuited with the well region. In addition, leakage currents can be increased because of the over-etching.
Accordingly, a need remains for a method for forming contact holes without causing the over-etching problem.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the invention to provide a method for forming contact holes which can prevent a silicon substrate from being over-etched in order that a capacitor electrode or a bit line is not short-circuited with a well region in the silicon substrate.
According to an aspect of the present invention, a method for forming a contact hole comprises the steps of etching a silicon substrate using a trench forming mask to form a trench therein; filling the trench with a first insulating layer to form an isolation trench; forming a second insulating layer over the silicon substrate including the isolation trench; forming an etch stopper layer on the second insulating layer; forming a third insulating layer on the etch stopper layer; etching the third insulating layer until the etch stopper layer is exposed, to form an opening; and sequentially etching the etch stopper and second insulating layers within the opening to form a contact hole.


REFERENCES:
patent: 4371423 (1983-02-01), Yoshizawa et al.
patent: 5538922 (1996-07-01), Cooper et al.
patent: 5726100 (1998-03-01), Givens
patent: 5843816 (1998-12-01), Liaw et al.
patent: 5858877 (1999-01-01), Dennison et al.
patent: 5866465 (1999-02-01), Doan et al.
patent: 5895250 (1999-04-01), Wu
patent: 5946569 (1999-08-01), Huang

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