Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2000-08-04
2003-01-21
Utech, Benjamin L. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S702000, C438S715000, C438S738000
Reexamination Certificate
active
06509274
ABSTRACT:
This invention relates to improved methods for forming aluminum lines over aluminum-filled vias or plugs. More particularly, this invention relates to methods for forming aluminum lines over vias filled with aluminum that can compensate for some misalignment.
BACKGROUND OF THE INVENTION
Aluminum has been widely used to form conductive lines and vias in the manufacture of semiconductor devices. An opening is made in a dielectric layer, such as a silicon oxide layer, and filled with aluminum metal. An overlying aluminum line is then formed over the via to provide conductive lines to connect the via to other devices on the substrate. The use of aluminum metal is advantageous because it is highly conductive, and thus a via filled with aluminum has low resistance; it is easy to deposit, either by sputtering or by chemical vapor deposition (hereinafter CVD); and an aluminum layer can be etched readily to form conductive lines by plasma etching.
The shrinking diameter of vias and lines has also required that the via and line diameters be about the same. In the past, a line width greater than the diameter of a via (overlap) could be used, and thus accommodation to some misalignment of the patterning of the lines to the via could be readily realized. However, because circuit density has increased and feature sizes have decreased, the overlap can no longer be tolerated and reduction or elimination of line overlap (called zero overlap) has become necessary.
However, aluminum layers used to define aluminum lines have a thickness of about 5000 to 10,000 angstroms. When etching an aluminum layer to form aluminum lines, the rapid etch rate required for etching such a thick aluminum layer economically is difficult to control, particularly near the end of the etch step.
When an aluminum line is to be formed over an aluminum via, this etch rate problem is exacerbated and any exposed aluminum via due to misalignment is etched along with the line, leaving a void in the via opening. As the spacing and line width of these features is made ever smaller, i.e., for design rules of less than 0.50 micron, and particularly as design rules are reduced to 0.25 micron and less, the problem of nonalignment becomes more pronounced. A misalignment occurs because it is more difficult to precisely pattern thin, narrow aluminum lines. A result of this misalignment is that during etching to form the aluminum lines, if the line is not aligned perfectly with the aluminum via, the etchant for the aluminum layer used to form the lines etches any exposed aluminum in the via that is not covered with the line aluminum.
The problem addressed by the present invention can be illustrated with reference to
FIGS. 1A
to
1
C.
FIG. 1A
shows a silicon oxide substrate
12
having a via therein
14
filled with aluminum. An aluminum layer
16
has been deposited over the filled via
14
and a patterned photoresist layer
18
is formed thereover. It is apparent that there is some misalignment between the via
14
and the photoresist pattern
18
.
The aluminum metal layer
16
is then anisotropically etched to form an aluminum line
20
beneath the photoresist line
18
, as shown in FIG.
1
B. Since the etch is difficult to control as the substrate
12
is approached, the etch removes not only the aluminum on the surface of the substrate
12
outside of the photoresist pattern, but also removes that portion of the aluminum via that is exposed by the misaligned line.
FIG. 1C
shows that after the photoresist
18
is removed, an opening or void
22
has been formed in the via
14
by the etchant.
Thus a method of etching the aluminum lines and of compensating for some misalignment between an aluminum line over an aluminum via that does not leave a void in the aluminum via would be highly desirable.
SUMMARY OF THE INVENTION
We have found a method that etches aluminum lines over aluminum vias that compensates for some misalignment in patterning the aluminum lines, but that does not leave voids in the aluminum vias. This method deposits a thin layer of aluminum by chemical vapor deposition over a barrier lined via. The thin layer of aluminum is drawn into and fills the via by heating under vacuum. Alternate aluminum and liner-barrier layers are used to form an aluminum line over the filled via, permitting the use of different etch chemistries and allowing etching of aluminum lines without etching the aluminum to form a void in the filled via.
In a first embodiment, a liner-barrier layer is deposited in the via. Aluminum is then deposited onto the surface of the substrate and into the opening, partially filling the opening. This aluminum layer is about 400 to 1000 angstroms thick. The aluminum is then heated under vacuum to draw the aluminum down into the opening, filling the opening. The aluminum film on the top surface of the substrate is then removed. A liner-barrier layer, which also acts as an etch stop, is then deposited on the substrate, an aluminum layer to make the aluminum lines is deposited, and a patterned photoresist layer is formed over the filled opening. The aluminum layer is then patterned by selectively anisotropically etching the aluminum layer. Any misalignment between the aluminum line and the aluminum via is compensated for by the barrier layer, which is removed using a different etch chemistry that does not etch the aluminum in the via.
In a second embodiment, the initial steps are the same, but the aluminum on the substrate is not removed. A liner-barrier or etch stop layer is deposited over the substrate, aluminum is deposited, and a line pattern formed beneath a patterned photoresist layer. Any misalignment is compensated for during the etch steps because the barrier layer protects the underlying aluminum. The final aluminum layer adjacent to the substrate surface is thin, and etching down to the substrate can be readily controlled by controlling the etch rate so that the etchant removes the aluminum on the surface of the substrate but does not etch the aluminum in the vias.
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Chen Liang-Yuh
Chou Jing-Pei
Guo Ted
Mosely Roderick C.
Applied Materials Inc.
Chen Kin-Chan
Morris Birgit E.
Utech Benjamin L.
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