Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-05-30
2000-07-11
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438239, 438250, 438253, 438393, 438396, 438648, H01L 218234
Patent
active
060872128
ABSTRACT:
In a process for forming a storage node electrode in the COB structure DRAM, after a titanium nitride film is formed on a surface of a second interlayer insulator film, a node contact hole is formed to penetrate through the titanium nitride film and the underlying interlayer insulator films, and then, an N.sup.+ polysilicon film is formed to cover the titanium nitride film and to fill the node contact hole. This N.sup.+ polysilicon film is patterned by an anisotropic dry etching to form a silicon film pattern. An exposed titanium nitride film which is not covered by the silicon film pattern is converted into a titanium oxide. Thus, a storage node electrode is formed of the silicon film pattern and the titanium nitride film remaining under the silicon film pattern, with no notch being formed in the storage node electrode.
REFERENCES:
patent: 5953609 (1999-09-01), Koyama et al.
Japanese Office Action dated Jun. 2, 1998, with English language translation of Japanese Examiner's comments.
Gurley Lynne A.
NEC Corporation
Niebling John F.
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