Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2003-06-30
2004-10-26
Gurley, Lynne A. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S533000, C438S586000, C438S597000, C438S618000, C438S621000, C438S639000, C438S666000, C438S672000, C438S700000, C438S702000, C438S740000, C438S902000, C438S976000
Reexamination Certificate
active
06808975
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for forming a self-aligned contact hole. More particularly, the present invention relates to a method for forming contact holes between closely disposed conductive structures on a substrate using a self-aligning process.
2. Description of the Related Art
As semiconductor devices become more highly integrated and are required to have higher response speeds, patterns formed on a substrate must become increasingly minute. More particularly, a width of a pattern and a space between adjacent patterns are being greatly reduced. Specifically, since a contact should be formed to connect isolated devices on a semiconductor substrate to a highly conductive film, while an aligning margin and an isolation margin are maintained, the contact occupies a significant area on the semiconductor substrate. Accordingly, dimensions of the contact greatly affect the overall size of a memory device in which identical cells are repeatedly formed, such as a dynamic random access memory (DRAM), a static random access memory (SRAM) or a non-volatile memory (NVM).
Recently, a contact having a minute size has not been able to be exactly formed using conventional semiconductor manufacturing methods even though the semiconductor technology has been rapidly developed to form a line width of below approximately 0.25 &mgr;m. In addition, heights of conductive film patterns have increased in order to reduce resistances of the conductive film patterns as widths of the conductive film patterns have decreased. As a result, formation of a contact between the conductive film patterns becomes increasingly difficult. Hence, in a case that a design rule does not have a sufficient margin and patterns having identical shapes are repeatedly formed, such as in a memory device, a method for forming a contact hole using a self-aligning process has been developed to reduce the overall area of the device.
FIGS. 1A
to
1
E illustrate cross-sectional views of stages in a conventional method for forming a self-aligned contact hole.
Referring to
FIG. 1A
, after a conductive film is formed on a substrate
10
, a nitride film is formed on the conductive film. Then, portions of the nitride film and the conductive film are etched to expose the substrate
10
so that conductive structures
15
including conductive film patterns
12
and nitride film patterns
14
are formed on the substrate
10
.
Referring to
FIG. 1B
, a nitride film is uniformly formed on the conductive structures
15
and on the substrate
10
. The nitride film is then anisotropically etched so that the nitride film remains at sidewall portions of the conductive structures
15
, thereby forming nitride spacers
16
. Here, upper portions of the nitride film patterns
14
on the conductive film patterns
12
are partially etched while the nitride film on the substrate
10
is completely removed. Thus, the upper portions of the nitride film patterns
14
a
have rounded shapes.
Referring to
FIG. 1C
, an insulation film
18
including silicon oxide is formed to fill a space between the conductive structures
15
including the nitride spacers
16
.
Referring to
FIG. 1D
, using an anisotropic etching process having an etching selectivity between silicon oxide and silicon nitride, a predetermined portion of the insulation film
18
is etched to form a preliminary contact hole exposing a portion of the substrate
10
between the conductive structures
15
including the nitride spacers
16
a
. When the insulation film
18
is etched to expose the portion of the substrate
10
between the conductive structures
15
having the nitride spacers
16
, an upper portion of the nitride spacers
16
a
is etched in accordance with a ratio corresponding to the etching selectivity.
Referring to
FIG. 1E
, the substrate
10
and the resultant structures formed thereon are rinsed with a rinsing chemical to remove polymers generated during the etching so that self-aligned contact holes
20
are formed. When the substrate
10
is rinsed, an exposed portion of the etched insulation film
18
a
is partially etched.
As the patterns become much smaller to meet demand of high integration of semiconductor devices, several disadvantages of this conventional method for forming the self-aligned contact hole become apparent.
First, a thickness of the nitride spacer
16
should be reduced so that a space between the conductive structures
15
may be significantly decreased. When the nitride spacer
16
has a relatively large thickness, the space between the conductive structures
15
becomes so narrow that the insulation film
18
may not be able to completely fill in the space. In addition, a parasitic capacitance may be increased due to the nitride spacer
16
. Alternately, when the thickness of the nitride spacer
16
decreases, the conductive film pattern
12
covered by the nitride spacer
16
may be easily exposed because the nitride spacer
16
may be consumed during formation of the self-aligned contact hole
20
. As a result, a bridge failure frequently occurs between the conductive film pattern
12
and conductive materials filling the self-aligned contact hole
20
.
Second, upper side, or “shoulder,” portions of the nitride spacers
16
a
become increasingly rounded as widths of the conductive structures
15
decrease. When the shoulder portions of the nitride spacers
16
a
have more rounded shapes, predetermined portions of the nitride spacers
16
and the nitride film patterns
14
a
are rapidly etched during the formation of the self-aligned contact hole
20
, so the conductive film patterns
12
covered by the nitride spacers
16
may be exposed.
Third, a depth of the contact hole
20
necessarily increases as the heights of the conductive structures
15
increase. Thus, a process failure such as a non-opening of a contact may increase.
Fourth, a remaining portion of the etched insulation film
18
a
on the nitride spacer
16
significantly decreases as the space between adjacent conductive structures
15
decreases. Further, the remaining portion of the etched insulation film
18
a
may be completely removed during subsequent processes. Hence, a process failure frequently occurs wherein the conductive materials filling the contact holes
20
are connected to each other during the subsequent processes.
SUMMARY OF THE INVENTION
The present invention has been made in an effort to solve the aforementioned problems and accordingly, it is a feature of an embodiment of the present invention to provide a method of forming a self-aligned contact hole that is able to minimize process failures.
In order to provide this feature of an embodiment of the present invention, there is provided a method for forming a self-aligned contact hole including (a) forming a plurality of conductive structures on a semiconductor substrate, each conductive structure including a conductive film pattern having an upper and side surfaces and a protection pattern formed on the upper and surfaces of the conductive film pattern; (b) forming a first insulation film to fill a space between adjacent conductive structures; (c) successively etching upper portions of the first insulation film and the protection patterns until each of the protection patterns has a level upper surface that is exposed; (d) forming a second insulation film on the resultant structure on the semiconductor substrate; and (e) selectively etching portions of the second insulation film and the first insulation film using a photolithography process to form the self-aligned contact hole exposing a portion of the semiconductor substrate between adjacent conductive structures.
In one embodiment of the present invention, the successive etching results in the first insulation film being etched slower than the protection pattern so that a portion of the first insulation film filled between adjacent conductive structures protrudes from the upper surface of the conductive structures.
The method of the present invention may further include forming a nitride liner o
Seo Jun
Song Jong-Heui
Gurley Lynne A.
Lee & Sterba, P.C.
Samsung Electronics Co,. Ltd.
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