Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-11-08
2005-11-08
Kennedy, Jennifer M. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S248000, C438S247000, C438S244000, C438S390000, C438S392000, C438S391000, C438S387000
Reexamination Certificate
active
06962847
ABSTRACT:
A method for forming a self-aligned buried strap in a vertical memory cell. A semiconductor substrate with a trench is provided. A collar dielectric layer is conformally formed on the trench bottom portion, and the trench is filled with a conducting layer. The collar dielectric layer is etched below the level of the surface of the conducting layer to form a groove between the conducting layer and the trench. The groove is filled with a doped conducting layer. The dopant in the doped conducting layer is diffused to the semiconductor substrate in an ion diffusion area as a buried strap. The conducting layer and the doped conducting layer are etched below the ion diffusion area. A top trench insulating layer is formed on the bottom of the trench, wherein the top trench insulating layer is lower than the ion diffusion area.
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Huang Chen-Chou
Huang Cheng-Chih
Shih Neng-Tai
Yang Sheng-Wei
Kennedy Jennifer M.
Nanya Technology Corporation
Quintero Law Office
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