Method for forming a dielectric spacer in a non-volatile...

Details Method for forming a dielectric spacer in a non-volatile... Method for forming a dielectric spacer in a non-volatile...

2005-06-21

2005-06-21

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S262000, C438S595000

Reexamination Certificate

active

06908816

ABSTRACT:
Embodiments of the present invention relate to a method for fabricating a Vss line in a memory device, which comprises: forming a plurality of memory cells above a semiconductor substrate, forming a channel between two of the memory cells, forming an oxide
itride/oxide stack above the memory cells and the channel, removing a portion of the oxide
itride/oxide stack between the memory cells to expose the semiconductor substrate, removing the oxide
itride/oxide stack above the gates of the memory cells, forming a plurality of source regions in the substrate between the memory cells, forming a poly-silicon layer above the memory cells and the channel to connect to the source regions, and removing a sufficient portion of the poly-silicon layer to form a Vss line.

REFERENCES:
patent: 6303959 (2001-10-01), Ratnam
patent: 6551880 (2003-04-01), Lai et al.
patent: 6699753 (2004-03-01), Ma et al.
patent: 6833581 (2004-12-01), Hui et al.

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