Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1999-05-11
2001-03-20
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S238000
Reexamination Certificate
active
06204109
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor capacitors, and more particularly to a method for forming a cylindrical capacitor of a dynamic random access memory cell.
2. Description of the Prior Art
Demand for dynamic random access memories (DRAMs) has rapidly increased owing to widespread use of integrated circuits. Each cell of the DRAM includes transistors and a capacitor, which is used for the purpose of charge storage. As the DRAM becomes highly integrated, the area occupied by the capacitor of the DRAM storage cell shrinks, thus decreasing the capacitance of the capacitor owing to its smaller electrode surface area. In order to reduce the cell dimension and yet obtain a high capacitance, the cylinder-shaped capacitor, which includes an inner surface in addition to an outer surface, was disclosed to increase the surface area of the capacitor electrode.
Unfortunately, the conventional cylindrical capacitor suffers complex and complicated processing steps, and generates DRAM cells with low quality. A conventional process for forming a cylindrical capacitor includes firstly providing a substrate having transistors manufactured thereon, followed by forming a dielectric layer having contact hole therein. Subsequently, a polysilicon layer is deposited on the dielectric layer and also fills the contact holes. Based on this polysilicon layer, a combination of oxide layer formation, etching stop layer formation, polysilicon layer formation, planarization technique, photolithography and etch process is repeatedly performed in order to finally form a cylindrical structure as shown in FIG.
1
A. This resultant structure consists of a silicon oxide pillar
01
surrounded by polysilicon
02
. After removing the polysilicon
02
, a cylindrical polysilicon electrode is thus achieved as shown in FIG.
1
B. Due to the complex and complicated processing steps, the fabricated DRAM capacitors are apt to suffer defects. More specifically, a silicon nitride layer is required to provide as an etch stop while removing unwanted polysilicon. The silicon nitride layer further requires planarization process such as chemical mechanical polishing (CMP). Moreover, as the cylindrical polysilicon electrode takes shape in a number of steps, the joints inside the cylindrical polysilicon electrode are not strong enough to resist pressure, thus decreasing manufacturing throughput and product quality.
FIGS. 2A and 2B
demonstrate another conventional method for forming a cylindrical capacitor. In this method, a spacer
04
composed of silicon oxide or silicon nitride is formed over a polysilicon layer
03
. After etching the polysilicon layer
03
using the spacer
04
as a mask, a resultant cylindrical capacitor electrode is achieved. This method disadvantageously requires deposition and etching back for forming the spacer. Furthermore, the width of the spacer is not practically controllable in a predetermined manner, thereby usually resulting in a cylindrical capacitor having horn formation on top of the capacitor, which is apt to be broken into fragments, thus complicating the subsequent process.
For the foregoing reasons, there is a need for a method of forming a cylindrical capacitor of a dynamic random access memory cell, so that the process can be simplified, and the manufacturing throughput and product quality can be increased.
SUMMARY OF THE INVENTION
In accordance with the present invention, a method is provided for forming a cylindrical capacitor of a dynamic random access memory cell that substantially simplifies the process and increases he manufacturing throughput and product quality. In one embodiment, a semiconductor substrate having a dielectric layer thereon is firstly provided, and at least one contact hole is formed in the dielectric layer. The contact hole extends from a top surface of the dielectric layer to a surface of the substrate. Next, a polysilicon layer is formed on the dielectric layer, and a silicon nitride layer is then formed on the polysilicon layer. The polysilicon layer fills the contact hole, wherein at least one trench is formed in the silicon nitride layer and a portion of the polysilicon layer, and wherein the trench locates approximately above the contact hole. Thereafter, an implantation (for example, P
+
)impurity-enhanced oxide layer is thermally formed on inner surface of the trench. Finally, the silicon nitride layer and a portion of the polysilicon layer are etched using the oxide layer as a mask, thereby forming a cylindrical electrode of the capacitor.
BRIEF DESCRIPTION OF THE DRAWINGS
The foregoing aspects and many of the attendant advantages of this invention will become more readily appreciated as the same becomes better understood by reference to the following detailed description, when taken in conjunction with the accompanying drawings, wherein:
FIG. 1A
shows a cross-sectional view illustrative of a conventional method for forming a cylindrical capacitor;
FIG. 1B
shows cross-sectional view of a resultant structure in connection with the method of
FIG. 1A
;
FIG. 2A
shows a cross-sectional view illustrative of another conventional method for forming a cylindrical capacitor;
FIG. 2B
shows cross-sectional view of a resultant structure in connection with the method of
FIG. 2A
;
FIG. 3
shows cross-sectional view demonstrative of the provided substrate and transistors in accordance with one embodiment of the present invention;
FIG. 4
shows cross-sectional view demonstrative of the formed trench in accordance with the embodiment of the present invention;
FIG. 5
shows cross-sectional view demonstrative of the formed implantation-impurity-enhanced thermal oxide layer in accordance with the embodiment of the present invention; and
FIG. 6
shows cross-sectional view demonstrative of the resultant cylindrical electrode in accordance with the embodiment of the present invention.
REFERENCES:
patent: 5811331 (1998-09-01), Ying et al.
patent: 5902126 (1999-05-01), Hong et al.
patent: 5930621 (1999-07-01), Kang et al.
patent: 6025246 (2000-02-01), Kim
Nelms David
Nhu David
United Microelectronics Corp.
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