Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-02-15
2005-02-15
Wojciechowicz, Edward (Department: 2815)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S288000, C438S297000, C438S692000, C438S694000, C438S696000, C438S791000, C257S314000, C257S347000
Reexamination Certificate
active
06855602
ABSTRACT:
A method for forming an improved etching hardmask oxide layer in a polysilicon etching process including providing a planarized semiconductor wafer process surface including adjacent first exposed polysilicon portions and exposed oxide portions; selectively etching through a thickness portion of the exposed oxide portions; thermally growing an oxide hardmask layer over the exposed polysilicon portions to form oxide hardmask portions; exposing second exposed polysilicon portions adjacent at least one oxide hardmask portion; and, etching through a thickness portion of the second exposed polysilicon portions.
REFERENCES:
patent: 20030129840 (2003-07-01), Kumar et al.
patent: 20040036118 (2004-02-01), Abadeer et al.
Chang Yi-Shing
Chu Wen-Ting
Tsai Chia-Shiung
Tu Yeur-Luen
Taiwan Semiconductor Manufacturing Co. Ltd.
Tung & Associates
Wojciechowicz Edward
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