Method for fabricating strained-silicon CMOS transistors

Details Method for fabricating strained-silicon CMOS transistors Method for fabricating strained-silicon CMOS transistors

2006-12-05

2009-11-17

Chaudhari, Chandra (Department: 2891)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S300000, C257SE21634

Reexamination Certificate

active

07618856

ABSTRACT:
A semiconductor substrate having a first active region and a second active region for fabricating a first transistor and a second transistor is provided. A first gate structure and a second gate structure are formed on the first active region and the second active region and a first spacer is formed surrounding the first gate structure and the second gate structure. A source/drain region for the first transistor and the second transistor is formed. The first spacer is removed from the first gate structure and the second gate structure and a cap layer is disposed on the first transistor and the second transistor and the cap layer covering the second transistor is removed thereafter. An etching process is performed to form a recess in the substrate surrounding the second gate structure. An epitaxial layer is formed in the recess and the cap layer is removed from the first transistor.

REFERENCES:
patent: 6165826 (2000-12-01), Chau et al.
patent: 7442967 (2008-10-01), Ko
patent: 7452764 (2008-11-01), Hoffmann
patent: 2005/0266632 (2005-12-01), Chen
patent: 1227058 (2005-01-01), None
patent: 1230460 (2005-04-01), None
patent: 1256129 (2006-06-01), None

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