Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-06-30
2000-10-31
Fourson, George
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438595, H01L 21336
Patent
active
061401927
ABSTRACT:
A method for fabricating a semiconductor device. A substrate having a gate is provided. An ion implantation process is performed to form lightly doped source/drain region in the substrate. A liner layer and an insulation layer are formed over a substrate in sequence. A portion of the insulation layer is removed by an anisotropic etching process. The insulation layer remaining on sidewalls of the gate is used as a spacer. A top of the spacer is substantially level with an upper surface of the liner layer. An ion implantation process is performed to form heavily doped source/drain region in the substrate. A portion of the spacer is removed by wet etching. As a result, a top surface of the spacer is lower than the upper surface of the gate. The method can increase the exposed surface of the gate and maintain sufficient width of the lightly doped source/drain region to prevent the hot carrier effect and the short channel effect.
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patent: 5573965 (1996-11-01), Chen et al.
patent: 5783479 (1998-07-01), Lin et al.
patent: 5851890 (1998-12-01), Tsai et al.
patent: 5915182 (1999-06-01), Wu
Huang Michael W C
Lu Hsiao-Ling
Yew Tri-Rung
Fourson George
Garcia Joannie A.
United Microelectronics Corp.
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