Method for fabricating laminated silicon gate electrode

Details Method for fabricating laminated silicon gate electrode Method for fabricating laminated silicon gate electrode

2005-03-01

2005-03-01

Smith, Matthew (Department: 2825)

Semiconductor device manufacturing: process

Formation of semiconductive active region on any substrate

Polycrystalline semiconductor

C438S308000, C438S482000, C438S795000

Reexamination Certificate

active

06861339

ABSTRACT:
Within a method for forming a silicon layer, there is employed at least one sub-layer formed of a higher crystalline silicon material and at least one sub-layer formed of a lower crystalline silicon material. The lower crystalline silicon material is formed employing a hydrogen treatment of the higher crystalline silicon material. The method is particularly useful for forming polysilicon based gate electrodes with enhanced dimensional control and enhanced performance.

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