Method for fabricating high density integrated circuits using ox

Details Method for fabricating high density integrated circuits using ox Method for fabricating high density integrated circuits using ox

1996-08-01

1998-08-11

Chang, Joni

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438255, H01L 218242

Patent

active

057926875

ABSTRACT:
The preset invention provides a method of manufacturing miniature interconnects and capacitors for semiconductor memory devices. The method uses a configuration of two sets of spacers to form self aligned source/bit line contacts and capacitor storage electrodes. First spacers are formed on the sidewalls of an interlevel dielectric layer. The first spacers define the source/bit line contacts holes. Later, the second spacers are formed the sidewalls of the bit lines. The second spacers define the capacitor storage electrodes. The self-aligning process, which uses the two set of spacers, allows a wide processing overlay window for contact etching to form the contact holes and permits small contact holes with high aspect ratios. The method reduces the masking steps by defining both the source and drain contacts in the same masking step.

REFERENCES:
patent: 3970386 (1976-07-01), Kooi
patent: 5346844 (1994-09-01), Cho et al.
patent: 5389566 (1995-02-01), Lage
patent: 5451539 (1995-09-01), Ryou
patent: 5631185 (1997-05-01), Kim et al.

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