Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-08-07
2007-08-07
Chaudhari, Chandra (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257SE21637
Reexamination Certificate
active
11017469
ABSTRACT:
A method for making PMOS and NMOS transistors60, 70on a semiconductor substrate20that includes having a gate protection layer210over the gate electrode layer110during the formation of source/drain silicides120. The method may include implanting dopants into a gate polysilicon layer 115 before forming the protection layer215.
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Haowen Bu, et al, “Semiconductor Device Having a Fully Silicided Gate Electrode and Method of Manufacture Therefor” U.S. Appl. No. 10/808,168, filed Mar. 24, 2004.
Jiong-Ping Lu, et al, “Method For Manufacturing A Semiconductor Device Having A Silicided Gate Electrode And A Method For Manufacturing An Integrated Circuit Including The Same” U.S. Appl. No. 10/810,759, filed Mar. 26, 2004.
Shaofeng Yu, et al, “A Method for Manufacturing a Silicided Gate Electrode Using a Buffer layer” Patent Application Filed Dec. 8, 2004.
Bu Haowen
Hall Lindsey H.
Lu Jiong-Ping
Visokay Mark R.
Yu Shaofeng
Brady W. James
Chaudhari Chandra
Keagy Rose Alyssa
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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