Method for fabricating doped polysilicon lines

Details Method for fabricating doped polysilicon lines Method for fabricating doped polysilicon lines

2007-12-04

2007-12-04

Ghyka, Alexander (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S306000, C438S585000, C257SE21252, C257SE21302

Reexamination Certificate

active

10711771

ABSTRACT:
A method of fabricating polysilicon lines and polysilicon gates, the method of including: providing a substrate; forming a dielectric layer on a top surface of the substrate; forming a polysilicon layer on a top surface of the dielectric layer; implanting the polysilicon layer with N-dopant species, the N-dopant species about contained within the polysilicon layer; implanting the polysilicon layer with a nitrogen containing species, the nitrogen containing species essentially contained within the polysilicon layer.

REFERENCES:
patent: 5872049 (1999-02-01), Gardner et al.
patent: 5930617 (1999-07-01), Wu
patent: 5936287 (1999-08-01), Gardner et al.
patent: 6352900 (2002-03-01), Mehrotra et al.
patent: 6373113 (2002-04-01), Gardner et al.

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