Method for fabricating capacitors with hemispherical grains

Details Method for fabricating capacitors with hemispherical grains Method for fabricating capacitors with hemispherical grains

1999-04-12

2000-12-26

Tsai, Jey

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438398, H01L 218242

Patent

active

061658413

ABSTRACT:
A method for fabricating a semiconductor device, including a lower electrode layer having hemispherical grains, an upper electrode layer, and a dielectric layer interposed between the lower and upper electrode layers. Si-dangling bonds existing on the surface of an amorphous silicon layer dry etched using a lower electrode layer pattern are controlled so that an active migration of silicon atoms from the amorphous silicon layer surface is achieved, so that growth of hemispherical grains on the surface of the amorphous silicon layer is enabled to provide a lower electrode layer with an increased surface area. The amorphous silicon layer is formed with a passivation film of hydrogen thereon which suppresses the growth of natural oxide films and which can be desorbed from that layer at a low temperature during an annealing process carried out in an ultra-high vacuum CVD device for the formation of hemispherical grains. As a result, a large amount of Si-dangling bonds are formed on the surface of the amorphous silicon layer and the migration of silicon atoms is enhanced during the formation of hemispherical grains.

REFERENCES:
patent: 5385863 (1995-01-01), Tatsumi et al.
patent: 5663090 (1997-09-01), Dennison et al.
patent: 5926711 (1999-07-01), Woo et al.
M.C.M. van de Sanden et al., "High-quality a-Si:H grown at high rate using an expanding thermal plasma", Surface and Coatings Technology, vol. 97, pp. 719-722 (1997).

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