Method for fabricating an LDD MOS transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438231, H01L 21336

Patent

active

060135549

ABSTRACT:
A method for fabricating an LDD MOS transistor includes the steps of forming a gate conductor on a gate oxide layer formed on a substrate, forming a heavily doped source/drain region in the substrate using the gate conductor as a mask, thermally oxidizing the surface of the gate conductor and the substrate, thereby forming a reduced dimension gate conductor, and forming a lightly doped source/drain region in the substrate using the reduced dimension gate conductor as a mask. In the alternate, the method further includes the step of removing the oxidized surface of the gate conductor and the substrate using a cleaning process to expose the reduced dimension gate conductor before forming the lightly doped source/drain region. The thickness of the thermally oxidized surface of the gate conductor is about 500 .ANG..about.5000 .ANG..

REFERENCES:
patent: 5597752 (1997-01-01), Niwa

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