Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2011-07-19
2011-07-19
Fahmy, Wael M (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S589000, C257S330000, C257SE29131
Reexamination Certificate
active
07981748
ABSTRACT:
Vertical field effect transistor semiconductor structures and methods for fabrication of the vertical field effect transistor semiconductor structures provide an array of semiconductor pillars. Each vertical portion of each semiconductor pillar in the array of semiconductor pillars has a linewidth greater than a separation distance to an adjacent semiconductor pillar. Alternatively, the array may comprise semiconductor pillars with different linewidths, optionally within the context of the foregoing linewidth and separation distance limitations. A method for fabricating the array of semiconductor pillars uses a minimally photolithographically dimensioned pillar mask layer that is annularly augmented with at least one spacer layer prior to being used as an etch mask.
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Breitwisch Matthew J.
Lam Chung H.
Schrott Alejandro G.
Alexanian Vazken
Fahmy Wael M
International Business Machines - Corporation
Kalam Abul
Scully , Scott, Murphy & Presser, P.C.
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