Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1991-04-17
1997-08-12
Thomas, Tom
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438587, 438591, H01L 218247
Patent
active
056565275
ABSTRACT:
A method for fabricating a non-volatile semiconductor memory device having a storage cell array and a peripheral circuit, capable of controlling thickness of gate oxide layer of peripheral circuit area independently of formation of O--N--O insulation layer on storage cell area, is disclosed. A floating gate of a storage cell array is formed as a first conductive layer on a semiconductor substrate, an O--N--O insulation layer enclosing the floating gate is formed on the top surface of the substrate, and a gate oxide layer of peripheral circuit area is formed by making an oxide layer on the top surface of the substrate after removing the O--N--O insulation layer on the top surface of the peripheral circuit area.
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Choi Jeong-Hyeok
Kim Keon-soo
Bushnell Esq. Robert E.
Samsung Electronics Co,. Ltd.
Thomas Tom
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