Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-12-27
2005-12-27
Booth, Richard A. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
Reexamination Certificate
active
06979620
ABSTRACT:
A method for fabricating a flash memory cell is provided. After an ONO dielectric layer is formed on a first conductive layer over a tunnel oxide layer, a second conductive layer is formed on the ONO dielectric layer. Then, patterning the second conductive layer to form a periphery region comprising an exposed portion of a semiconductor substrate and a memory cell region comprising the left second conductive layer. During the present process, the ONO dielectric layer is protected from being exposed in various solvents and gases with the second conductive layer. Thus, a flash memory cell with a high-quality ONO gate dielectric layer, without increasing complexity of the process and additional masks, is obtained.
REFERENCES:
patent: 5098855 (1992-03-01), Komori et al.
Chen Hong-Chi
Chen Huei-Huarng
Kao Hsuan-Ling
Wu Chun-Pei
Booth Richard A.
Genus Law Group
Ho Raymond
Macronix International Co. Ltd.
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