Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-08-03
2000-11-14
Dutton, Brian
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438396, 438643, 438644, 438653, 438654, H01L 218244, H01L 218242, H01L 2120, H01L 214763, H01L 2144
Patent
active
061469416
ABSTRACT:
A fabricating method of a capacitor includes two gates and a commonly used source/drain region formed on a substrate. Then, a process of sell align contact has been applied to make a pitted self align contact window (PSACW) to partly expose the commonly used source/drain region. Then an glue/barrier layer and a lower electrode of the capacitor are formed over the PSACW. Then a dielectric thin film with a material having high dielectric constant is formed over the lower electrode. Then, an upper electrode is formed over the dielectric thin film to complete a capacitor, which has a structure of metal insulator metal with a shape like the PSACW.
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Hsieh Wen-Yi
Huang Kuo-Tai
Yew Tri-Rung
Dutton Brian
United Microelectronics Corp.
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