Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2002-01-14
2003-11-04
Whitehead, Jr., Carl (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S303000, C438S308000, C438S275000
Reexamination Certificate
active
06642118
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method of fabricating a semiconductor memory device, and more particularly to a method for eliminating polysilicon residue between two adjacent word lines.
BACKGROUND OF THE INVENTION
Memory technology has progressed considerably in recent years. Since the operational speed and the manipulation data amount of a central processing unit (CPU) is increasing, the performance of a memory cell is increasing at the same time. For example, high speed erasing is a popular method for improving the performance of a memory. Volatile storage memories, such as random access memories (RAM), are widely used in computer nowadays. However, the stored data in RAM vanishes while the power is broke off. Another nonvolatile storage memories, such as mask read only memory (Mask ROM), erasable programmable ROM (EPROM), or electrically erasable programmable ROM (EEPROM) will not lost the stored messages when power dismissed and will be better for some specific usage.
Flash memories are also a nonvolatile storage memory, which has similar structure than conventional EEPROMs. They have a very high erasing speed feature in either an overall region or a local region thereof, and therefore they are very popularly applied in the computer field. For example, they are used to replace the read-only memories to store the firmware such as BIOS (basic input/output system). The users can easily update their BIOS by rewriting the flash memory.
Conventional flash memory cells have a double or triple layer of polysilicon structure. The first polysilicon layer is patterned to form the floating gates, and the second polysilicon layer is patterned to form the control gates and the word lines of the structure. A third polysilicon layer is patterned as select gates to form the triple layer polysilicon structure.
In the process of fabricating flash memory cells, the first polysilicon layer is patterned by photolithography and etching technology to form a plurality of parallel lines. The second polysilicon layer is subsequently formed and patterned to form a plurality of parallel lines to serve as the control gates and the word lines of the structure that is perpendicular to the first polysilicon lines. While forming the control gates, the portion of underlying first polysilicon lines between two word lines is also removed until exposing the substrate to form the floating gates. However, in the procedure of etching the first polysilicon lines, since the anisotropic etching limitation, the removed portion of the first polysilicon lines is not completed and portion of the polysilicon is remained on the sidewall of the insulating layer. This results in circuit short between word lines because of the polysilicon residue connection, and therefore data can not be access to the memory.
SUMMARY OF THE INVENTION
The present invention provides a method for eliminating polysilicon residue, which can convert polysilicon residue into silicon dioxide to be an insulating material, thereby prevent circuit short problem.
In one aspect, the present invention provides a method for eliminating polysilicon residue on a sidewall. The method comprises the following steps. A tilted ion implantation step is performed to implant oxygen ions into the polysilicon residue on the sidewall. An oxygen anneal step is performed to fully convert the polysilicon residue into a silicon dioxide. The silicon dioxide has higher resistivity than the polysilicon so that the silicon dioxide can insolate the adjacent word lines and prevent circuit short.
In another aspect, the present invention provides a method for eliminating polysilicon residue adapted for a semiconductor substrate including a plurality of parallel word lines, the polysilicon residue is on the sidewall of an insulating layer between two word lines and connected the word lines. The method comprises the following steps. A tilted ion implantation step is performed to implant oxygen ions into the polysilicon residue on the sidewall. An oxygen anneal step is performed to fully convert the polysilicon residue into a silicon dioxide.
In another aspect, the present invention also provides a method of fabricating a semiconductor memory device. The method at least comprises the following steps. A gate oxide layer, a first polysilicon layer and a nitride layer are formed on a semiconductor substrate, and the nitride layer, the first polysilicon layer and the gate oxide layer are then patterned. An insulating layer is formed over the semiconductor substrate. A portion of the insulating layer is removed until exposing the nitride layer, and then the nitride layer is removed. A second polysilicon layer is formed on the first polysilicon layer and adjacent portion of the insulating layer. A dielectric layer, a third polysilicon layer and a conductive layer are formed over the semiconductor substrate. The conductive layer, the third polysilicon layer and the dielectric layer are patterned to form a plurality of parallel word lines, and a polysilicon residue is therefore formed on the sidewall of the insulating layer between the word lines. A tilted ion implantation step is performed to implant oxygen ions into the polysilicon residue. An oxygen anneal step is performed to convert the polysilicon residue into a silicon dioxide.
The method for eliminating the polysilicon residue of the present invention not only fully converts the polysilicon residue into the silicon dioxide to isolate the word lines, but also prevents oxygen encroachment caused by over oxidation and lowers thermal budget.
REFERENCES:
patent: 5401994 (1995-03-01), Adan
patent: 5488004 (1996-01-01), Yang
patent: 5670406 (1997-09-01), Tseng
Chen Ming-Shang
Su Chun-Lien
Wang Chun-Chi
Huynh Yennhu
Jr. Carl Whitehead
Mactronix International Co., Ltd.
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