Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
1999-03-04
2001-07-17
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S784000, C438S787000, C438S763000
Reexamination Certificate
active
06261975
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to the formation of a borophosphosilicate glass (“BPSG”) layer during the fabrication of integrated circuits on semiconductor wafers. More particularly, the present invention relates to a method for improving the reflow characteristics of a BPSG film enabling the film to fill gaps having higher aspect ratios and smaller widths while meeting the thermal budget requirements of modern day manufacturing processes.
Borophosphosilicate glass (“BPSG”) has found wide use in the semiconductor industry as a separation layer between the polysilicon gate/interconnect layer and the first metal layer of MOS transistors. Such a separation layer is often referred to as premetal dielectric (PMD) layer because it is deposited before any of the metal layers in a multilevel metal structure and is used to electrically isolate portions of the first deposited metal layer from the semiconductor substrate.
In addition to having a low dielectric constant, low stress and good adhesion properties, it is important for PMD layers to have good planarization and gap-fill characteristics. BPSG deposition methods have been developed to meet these characteristics and often include planarizing the layer by heating the layer above its reflow temperature so that it flows as a liquid. The reflow process enables the BPSG to better fill high-aspect ratio, small-width trenches and results in a flat upper surface upon cooling. The heating necessary to reflow a BPSG layer can be achieved using either a rapid thermal pulse (RTP) method or a conventional furnace in either a dry (e.g., N
2
or O
2
) or wet (e.g., steam H
2
/O
2
) ambient. These processes are generally considered to be somewhat equivalent and thus interchangeable for many applications. If any particular benefits are attributable to one process over the others, however, persons of skill in the art generally believe that annealing a BPSG layer in a conventional furnace having a wet (steam) ambient provides better gap-fill properties than using RTP methods and that dry conventional furnace anneals are basically equivalent to RTP methods in terms of gap-fill characteristics.
Standard BPSG films are formed by introducing a phosphorus-containing source and a boron-containing source into a processing chamber along with the silicon-and oxygen-containing sources normally required to form a silicon oxide layer. Examples of phosphorus-containing sources include triethylphosphate (TEPO), triethylphosphite (TEP
i
), trimethylphosphate (TMOP), trimethylphosphite (TMP
i
), and similar compounds. Examples of boron-containing sources include trietbylborate (TEB), trimethylborate (TMB), and similar compounds.
As semiconductor design has advanced, the feature size of the semiconductor devices has dramatically decreased. Many integrated circuits (ICs) now have features, such as traces or trenches that are significantly less than a micron across. While the reduction in feature size has allowed higher device density, more complex circuits, lower operating power consumption, and lower cost, the smaller geometries have also given rise to new problems, or have resurrected problems that were once solved for larger geometries.
One example of a manufacturing challenge presented by submicron devices is the ability to completely fill a narrow trench in a void-free manner while keeping the thermal budget of the trench-filling process at a minimum. For example, in order to meet the manufacturing requirements of 0.18 micron geometry devices and below, a BPSG layer may be required to fill 0.1 micron wide gaps and narrower having an aspect ratio of up to 6:1. At the same time, these manufacturing requirements require that the thermal budget of the BPSG deposition and reflow step be kept to a minimum.
One method that manufacturers have developed in efforts to meet these and/or similar requirements is the addition of fluorine or similar halogen element to the BPSG film. Such fluorine-doped BPSG films are often referred to as “fluorinated-BPSG” or “FBPSG.” Fluorine is believed to lower the viscosity of the BPSG film so that it reflows easier during the reflow step. In this manner, the addition of fluorine can be used to improve the gap-fill and planarization of BPSG layers when deposited and reflowed at a given temperature. Alternatively, the addition of fluorine can be used to reduce the reflow temperature of the BPSG film while retaining gap-fill and planarization characteristics of a BPSG film reflowed at a higher temperature. U.S. Pat. No. 5,633,211 illustrates one example of a method used to deposit a FBPSG layer.
SUMMARY OF THE INVENTION
The present invention provides a new and improved process for filling small-width, high-aspect ratio gaps with a BPSG layer. The present invention deposits a halogen-doped BPSG layer (a fluorinated-BPSG layer in preferred embodiments) over a small-width, high-aspect ratio gap that requires filling with a dielectric material and reflows the layer in a rapid thermal pulse (RTP) furnace. The present inventors have found that reflowing a fluorinated-BPSG layer in an RTP furnace provides unexpectedly superior results as compared to reflowing the layer in a conventional furnace using either a dry or wet anneal process.
The inventors believe that the superior results are due in part to the highly mobile nature of fluorine atoms present in a fluorinated-BPSG film. Standard, non-RTP BPSG reflow methods, typically heat the BPSG film above the film's reflow temperature for between 20-40 minutes or more depending on the temperature used in the reflow process and the required degree of planarization. The present inventors have found that the temperature of the reflow process and the physical nature of the layer beneath the FBPSG layer are important to the reflow characteristics of FBPSG layer when the layer is reflowed in a conventional furnace. More specifically, the present inventors have discovered that when the FBPSG layer is deposited over a PECVD TEOS silicon oxide layer (a silicon oxide layer deposited by a plasma CVD process using TEOS and oxygen precursor gases), the reflow characteristics of the FBPSG film are about the same as a similar BPSG film without fluorine. Similarly, when the FBPSG layer is deposited over a LP nitride (silicon nitride film deposited from a low pressure CVD process) layer and reflowed at a temperature of about 800° C. or higher, the reflow characteristics of the film are similar to those of a similar BPSG film without fluorine. In other words, in both of these cases, the addition of fluorine to the BPSG film does not significantly improve the reflow characteristics of the film.
The inventors discovered that FBPSG films did indeed, however, exhibit better reflow characteristics than BPSG films when deposited over denser underlying layers, such as LP nitride layers and reflowed in a conventional furnace at a relatively low anneal temperature (e.g., less than about 750° C.). It is theorized that the highly mobile fluorine atoms in the BPSG film migrate into the layers underlying the film. When the FBPSG layer is deposited over a relatively dense layer such as an LP nitride layer and reflowed at a temperature of around 750° C. or less, the underlying layer acts as a barrier that reduces the diffusion rate of fluorine into the layer. When the FBPSG layer is deposited over a PETEOS oxide layer, though, the fluorine atoms move with relative ease from the FBPSG layer into the oxide layer during the reflow process. The inventors believe that the excursion of fluorine atoms into the oxide layer in this manner happens within a relatively early stage of the anneal process thus depriving the FBPSG layer of fluorine atoms for a significant portion of the reflow process and preventing the fluorine from improving the viscosity and gap-fill properties of the layer.
According to the method of the present invention, an FBPSG layer is deposited over a substrate and reflowed using a rapid thermal pulse (RTP) method. Such an RTP method reflows the film in a minimal amount of time (e.g., 10-90
Campana Francimar
Xia Li-Qun
Yieh Ellie
Applied Materials Inc.
Lindsay Jr. Walter L.
Niebling John F.
Townsend and Townsend and Crew
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