Method for constructing a film on a semiconductor wafer

Coating processes – Direct application of electrical – magnetic – wave – or... – Pretreatment of substrate or post-treatment of coated substrate

Reexamination Certificate

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C427S539000, C427S255394, C427S255391, C427S578000, C438S785000, C438S786000

Reexamination Certificate

active

06699530

ABSTRACT:

BACKGROUND OF THE INVENTION
A. Field of the Invention
The present invention is directed toward the field of manufacturing integrated circuits.
B. Description of the Related Art
When manufacturing integrated circuits, deposition processes are employed to deposit thin layers of insulative material and conductive material onto wafers. Deposition has been performed through various well known processes, such as chemical vapor deposition (“CVD”) and physical vapor deposition (“PVD” or “sputtering”).
In a CVD process, a wafer is loaded into a chemical vapor deposition chamber. Conventional CVD processes supply reactive gases to the wafer surface where heat-induced chemical reactions take place to form a thin film layer over the surface of the wafer being processed. One particular CVD application is the deposition of a titanium containing compound, such as titanium nitride, over a wafer from a process gas that includes a metallo-organic compound. One such compound is tetrakis (dialkylamido) titanium (Ti(NR
2
)
4
) having the following structural formula:
wherein R at each occurrence independently is in an alkyl group, of, for example, 1-5 carbon atoms. For example, it is common to use tetrakis(dimethylamido) titanium (TDMAT), which has the formula Ti(N(CH
3
)
2
)
4
.
A carrier gas, such as helium, argon, nitrogen, or hydrogen brings the compound into the chamber, so that it may be infused with energy. The energy may be generated through a thermal heat source, in the case of thermal CVD, or a radio frequency (“rf”) signal source, in the case of plasma enhanced CVD. The energized chemical vapor reacts with the wafer's surface to form a thin layer of material on the wafer. When the TDMAT chemical vapor is used, a titanium nitride film is deposited on the wafer's surface.
In a sputtering process, a wafer is placed in a physical vapor deposition (“PVD”) chamber, and the chamber is filled with a gas, such as argon. A plasma containing positively charged ions is generated from the gas, by creating an electrical field in the chamber. The positively charged ions accelerate and collide into a target material, which is mounted in the chamber. Atoms of the target material are thereby separated from the target and deposited on the wafer to form a layer of target material on the surface of the wafer.
In a traditional sputtering process, the bombardment of the target material by the positively charged ions is enhanced by providing a negative bias to the target material. This is achieved by providing a radio frequency signal to an electrode that supports the target material.
A separate rf signal may be inductively coupled to the chamber for generating positively charged ions in a high density plasma PVD chamber. A high density plasma PVD chamber may include another rf signal coupled to a wafer support for improving the attraction of the target material to the wafer.
A deposition chamber, such as a CVD chamber or a PVD chamber, may be used to deposit diffusion barriers in an integrated circuit. Diffusion barriers inhibit the diffusion of a contact metal, such as aluminum and copper, into the active region of a semiconductor device that is built on a silicon substrate. This prevents the interdiffusion of a contact metal into the substrate. Unlike an insulative layer of material, a diffusion barrier forms a conductive path through which current may flow. For example, a diffusion barrier may be employed to overlie a silicon substrate at the base of a contact hole.
A severe interdiffusion between a contact metal and a silicon substrate can begin to take place when the integrated circuit is heated to temperatures in excess of 450° C. If an interdiffusion is allowed to occur, the contact metal penetrates into the silicon substrate. This causes an open contact in the integrated circuit and renders the integrated circuit defective.
In the fabrication of integrated circuits, there has been an increased use of aluminum and copper metallization processes operating at high temperatures, in excess of 450° C. Therefore, it desirable to have diffusion barriers with a greater ability to inhibit the diffusion of contact metals, such as aluminum and copper.
Traditionally, diffusion barriers have been made thicker to accommodate such a desire. However, smaller geometries are being employed in the fabrication of integrated circuits. The smaller geometries decrease the dimensions of contact holes, thereby making it desirable for diffusion barriers to become thinner and more conformal.
FIG. 1
illustrates a diffusion barrier
100
that resides between a conductive region
105
of a silicon substrate
101
and a contact plug
102
. A contact hole
103
is formed in an insulative layer of material
104
, such as silicon dioxide, which overlies the substrate
101
. The diffusion barrier
100
is ideally formed so that it is thin and substantially conforms to the contours of the surface of the contact hole
103
.
If the diffusion barrier
100
is thin and highly conformal, the contact metal
102
is able to form a sufficiently conductive ohmic contact with the silicon substrate's conductive region
105
. If the diffusion barrier
100
is too thick or poorly formed, as shown in
FIG. 2
, it will prevent the contact metal
102
from forming a sufficiently conductive ohmic contact with the substrate region
105
.
In
FIG. 2
, the poorly formed diffusion barrier
100
severely narrows the opening of the contact hole
103
. The narrow opening causes the contact metal
102
to form so that it does not reach the base of the contact hole
103
. As a result, a void
106
is formed.
In order to ensure a good ohmic contact between the contact metal
102
and the substrate region
105
, it is desirable for the resistance of the diffusion barrier
100
to be minimal. Typically, a resistivity value of 1,000 &mgr;&OHgr;-cm or less is acceptable. One material that has been successfully employed as a diffusion barrier is titanium nitride (TiN).
However, some deposition processes, such as those using TDMAT, provide an unstable barrier layer having high resistivity. In the case of TDMAT, this is partly due to a significant fraction of the deposited barrier material being composed of a carbon (hydrocarbons, carbides, etc.). Further, the titanium, a chemically reactive metal, may not be completely reacted in the film. It would be desirable to treat such a layer of barrier material with a post-deposition processing, so that its resistivity is reduced and stabilized.
In manufacturing an integrated circuit, it is desirable to perform successive steps of the manufacturing process, such as deposition and post-deposition processing, in the same chamber (“in-situ”). In-situ operations reduce the amount of contamination that a wafer is exposed to by decreasing the number of times that the wafer is required to be transferred between different pieces of manufacturing equipment. In-situ operations also lead to a reduction in the number of expensive pieces of manufacturing equipment that an integrated circuit manufacturer must purchase and maintain.
Accordingly, it would be desirable to construct a highly conformal thin diffusion barrier with an increased ability to inhibit the diffusion of contact metals, such as aluminum or copper. Additionally, it is desirable for such a diffusion barrier to have a resistance that allows the diffusion barrier to form a good path for current flow. It would also be desirable to construct such a diffusion barrier in-situ.
SUMMARY OF THE INVENTION
An apparatus and method in accordance with the present invention provides for carrying out the in-situ construction of a highly conformal diffusion barrier with improved resistivity. By practicing aspects of the present invention, the diffusion barrier's ability to impede the diffusion of contact metals, such as aluminum or copper, may be enhanced. Such an enhancement of the diffusion barrier will not significantly enlarge its thickness or resistivity beyond acceptable limits.
A semiconductor processing apparatus, which enables practicing embodiments of the pres

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