Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-12-18
2000-02-15
Whitehead, Jr., Carl
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438257, 438265, 438301, H01L 218247
Patent
active
060252405
ABSTRACT:
A system and method for providing a memory cell on a semiconductor is disclosed. In one aspect, the method and system include providing at least one gate stack on the semiconductor, depositing at least one spacer, and providing at least one source implant in the semiconductor. The at least one gate stack has an edge. A portion of the at least one spacer is disposed along the edge of the at least one gate stack. In another aspect, the method and system include providing at least one gate stack on the semiconductor, providing a first junction implant in the semiconductor, depositing at least one spacer, and providing a second junction implant in the semiconductor after the at least one spacer is deposited. The at least one gate stack has an edge. A portion of the at least one spacer is disposed at the edge of the at least one gate stack. In a third aspect, the method and system include providing at least one gate stack on the semiconductor, providing at least one source implant in the semiconductor, depositing at least one spacer after the at least one source implant is provided, and providing at least one drain implant in the semiconductor after the spacer is deposited. The at least one gate has an edge. A portion of the at least one spacer is disposed along the edge of the at least one gate.
REFERENCES:
patent: 4098618 (1978-07-01), Crowder et al.
patent: 4789883 (1988-12-01), Cox et al.
patent: 4912062 (1990-03-01), Verma
patent: 5077230 (1991-12-01), Woo et al.
patent: 5237188 (1993-08-01), Iwai et al.
patent: 5298447 (1994-03-01), Hong
patent: 5358894 (1994-10-01), Fazan et al.
patent: 5360751 (1994-11-01), Lee
patent: 5470773 (1995-11-01), Liu et al.
patent: 5550070 (1996-08-01), Funai et al.
patent: 5552331 (1996-09-01), Hsu et al.
patent: 5591652 (1997-01-01), Matsushita
patent: 5592415 (1997-01-01), Kato et al.
patent: 5599731 (1997-02-01), Park
patent: 5619051 (1997-04-01), Endo
patent: 5631179 (1997-05-01), Sung et al.
patent: 5648287 (1997-07-01), Tsai et al.
patent: 5677867 (1997-10-01), Hazani
patent: 5680345 (1997-10-01), Hsu et al.
patent: 5714413 (1998-02-01), Brigham et al.
patent: 5726070 (1998-03-01), Hong et al.
patent: 5759900 (1998-06-01), Suh
patent: 5789295 (1998-08-01), Liu
patent: 5933730 (1999-08-01), Sun et al.
Chan Vei-Han
Haddad Sameer
Luning Scott D.
Randolph Mark
Sobek Daniel
Advanced Micro Devices , Inc.
Guerrero Maria
Jr. Carl Whitehead
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