Method and structure for manufacturing contact windows in semico

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257296, H01L 27108, H01L 2976, H01L 2994, H01L 31119

Patent

active

061539007

ABSTRACT:
The invention relates to a semiconductor process, and in particular to a method and structure of manufacturing contact windows between different levels of two conductive layers (a upper conductive layer and a lower conductive layer) in the semiconductor process. In the method, first, a trench is formed under a subsequently-formed contact window between the upper conductive layer and lower conductive layer. The trench may be located on the insulating layer under the lower conductive layer. When the lower conductive layer is subsequently formed, the trench can be filled with the lower conductive layer. Therefore, part of the lower conductive layer on the trench is thicker than that on the other regions. When the insulating layer between the upper conductive layer and lower conductive layer is formed, an etching process is then performed to form the contact window, the contact window can not cross the lower conductive layer due to the lower conductive layer on the trench being sufficiently thick. Accordingly, the contact area between the upper conductive layer and lower conductive layer is increased, thereby reducing the contact resistance thereof.

REFERENCES:
patent: 5498889 (1996-03-01), Hayden
patent: 5677866 (1997-10-01), Kinoshita
patent: 5723889 (1998-03-01), Choi et al.
patent: 5998822 (1999-12-01), Wada

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