Method and circuit for testing a chip

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Details

C714S030000, C714S031000, C714S727000, C714S734000, C714S799000

Reexamination Certificate

active

07089472

ABSTRACT:
A circuit for testing a chip. The chip has an intellectual product circuit module, and the circuit has a multiplexer controller, several registers and a MUX finite state machine controller to configure these registers in different states according to the test patterns. In the next state, a test activating signal is provided to the intellectual product circuit module. The intellectual product circuit module is then operated and tested according to the output of the registers.

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patent: 4945536 (1990-07-01), Hancu
patent: 5198758 (1993-03-01), Iknaian et al.
patent: 5592493 (1997-01-01), Crouch et al.
patent: 6028983 (2000-02-01), Jaber
patent: 6178534 (2001-01-01), Day et al.
patent: 6493840 (2002-12-01), Shacham et al.
patent: 6686759 (2004-02-01), Swamy

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