Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2006-08-08
2006-08-08
Decady, Albert (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S030000, C714S031000, C714S727000, C714S734000, C714S799000
Reexamination Certificate
active
07089472
ABSTRACT:
A circuit for testing a chip. The chip has an intellectual product circuit module, and the circuit has a multiplexer controller, several registers and a MUX finite state machine controller to configure these registers in different states according to the test patterns. In the next state, a test activating signal is provided to the intellectual product circuit module. The intellectual product circuit module is then operated and tested according to the output of the registers.
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Hsu Ming-Hsun
Shih Ko-Yan
De'cady Albert
J.C. Patents
Trimmings John P.
VIA Technologies Inc.
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