Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2002-05-14
2004-11-16
Hassanzadeh, P. (Department: 1763)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S009000, C438S010000, C156S345240, C156S345280, C156S345470, C118S7230IR, C118S7230ER
Reexamination Certificate
active
06818562
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to semiconductor substrate processing systems and, more specifically, to a method and apparatus for operating an RF matching network in a plasma enhanced semiconductor wafer processing system.
2. Description of the Related Art
In semiconductor integrated circuit (IC) fabrication, devices such as component transistors are formed on a semiconductor wafer substrate that is typically made of silicon. During the fabrication process, various materials are deposited on different layers in order to build or form the desired integrated circuit. The various layers define devices that are interconnected by metallization lines. During certain plasma enhanced processes that are performed upon wafers (also referred to in the art as substrates) that already contain devices and metallized lines, a substantial amount of charge may accumulate on the surface of the wafer. This charge accumulation may not be uniform across the wafer. As such the charge accumulation may cause destructive currents to be induced in some of the metallized materials and/or cause arcing within dielectric layers. The currents and/or arcing may destroy or damage certain devices that have previously been formed on the wafer. To mitigate the charging effects and avoid charging damage, the power supplied to a plasma within a plasma enhanced reactor may be pulsed. As such, the power coupled to the plasma is pulsed during all or part of the plasma enhanced process. One example of such a technique for use in an etch reactor is disclosed in U.S. Pat. No. 6,255,221, issued Jul. 3, 2001.
One drawback of using a pulsed plasma etch reactor is that the power from an RF generator or RF source must be coupled through a dynamically tuned matching network (also referred to as a match unit) to an antenna or electrode within a plasma reactor. The pulsed power is coupled from the antenna or electrode to process gases within the reactor to form a plasma that is used for the etching process. The matching network ensures that the output of the RF source is efficiently coupled to the plasma to maximize the amount of energy coupled to the plasma. The matching network matches the, typically, 50 ohms to a complex impedance of the plasma. To facilitate dynamic matching as the plasma characteristics change during processing, the matching network is continuously adjustable to ensure that a match is achieved and maintained throughout processing.
Generally, a controller that executes the process recipe controls the matching network. The controller also monitors the reflected power from the matching network. If the reflected power from the matching network rises, the controller will adjust the capacitance or inductance of the matching network to achieve a more sufficient match for the RF source to the existing plasma within the chamber. Since the matching networks for coupling high power RF energy to a plasma generally contain mechanically tunable elements (i.e., capacitors and/or inductors), the tuning process may be slow compared to the pulse length of the RF pulse that is desired to be coupled to the plasma. As such, when pulsing power into the matching network as the network is adjusted with each pulse, the reflected power may be sporadic or inconsistent with actual reflected power, causing the controller to under or over adjust the matching network. Such continuous adjustment may cause excessive reflected power and a reduction in plasma power coupling efficiency.
Therefore, there is a need in the art for a method and apparatus for operating a matching network in a plasma enhanced semiconductor wafer processing system that uses pulsed power.
SUMMARY OF THE INVENTION
The present invention is a method and apparatus for operating a matching network within a plasma enhanced semiconductor wafer processing system that uses pulsed power for plasma processing. The invention comprises a circuit for monitoring an indicator of match accuracy from a matching network and a controller for adjusting the matching network in response to the indicator. The controller ignites a plasma in a continuous wave (CW) mode by applying continuous RF power to a process gas within a chamber. Once the plasma is ignited, the controller adjusts the matching network until the indicator shows a desired match has been achieved. The, system is then switched into a pulse mode where the RF power is pulsed and the matching network tuning parameters are held constant during operation in the pulsed mode. As such, the controller does not tune the match unit during operation of the system in the pulsed mode.
REFERENCES:
patent: 5273610 (1993-12-01), Thomas et al.
patent: 5971591 (1999-10-01), Vona et al.
patent: 6253704 (2001-07-01), Savas
patent: 6255221 (2001-07-01), Hudson et al.
patent: 6353206 (2002-03-01), Roderick
patent: 6472822 (2002-10-01), Chen et al.
patent: 36 13 181 (1987-10-01), None
patent: 39 40 083 (1991-06-01), None
patent: 42 02 447 (1992-07-01), None
patent: 42 04 848 (1992-08-01), None
patent: 0 200 951 (1986-12-01), None
patent: 0 363 982 (1990-04-01), None
patent: 0 383 570 (1990-08-01), None
patent: 0 497 023 (1992-08-01), None
patent: 0 822 582 (1998-02-01), None
patent: 2 290 413 (1995-12-01), None
patent: 63-13334 (1988-01-01), None
patent: 63-115338 (1988-05-01), None
patent: 3-129820 (1991-06-01), None
patent: H3-129820 (1991-06-01), None
patent: WO 99/10922 (1999-03-01), None
patent: 99/14855 (1999-03-01), None
patent: 01/84591 (2001-11-01), None
PCT International Search Report for PCT/US03/09937, dated Jan. 9, 2004 (AMAT/7265.PC).*
Siu, et al. “Effect of Pulsed Plasma, Pressure, and RF Bias on Electron Shading Damage,” 2000 5thInternational Symposium on Plasma Process-Induced Damage, May 23-24, Santa Clara, CA.
Lapucci, et al. “Discharge Impedance Variations in Large Area Radio Frequency Excited CO2 Lasers,” Appl. Phys. Lett. 71(14), Oct. 6, 1997.
Annex to From PCT/ISA/206 (Results of the Partial International Search), date Aug. 6, 2003 for PCT/US03/09937.
Okuhira, et al., “Microscopic Processing by Plasma,” Hitachi Seisakusho, Central Research Center, Jul. 11, 1989.
B. Mahi et al., “The etching of silicon in diluted SF6plasmas: Correlation between the flux of incident species and the etching kinetics”, J. of Vacuum Sciences & Technology, (1987) May/Jun., No. 3, pp. 657-666.
C.C. Tin, et al., “Effects of RF Bias on Remote Microwave Plasma Assisted Etching of Silicon on SF6” Journal of Electrochemical Society 138, Oct. 1991, pp. 3094-3100.
K. Tsujimoto et al., “A New Side Wall Protection Technique in Microwave Plasma Etching Using A Chopping Method”, 1986 International Conf. on Solid State Devices, Tokyo, pp. 229-232.
I.W. Rangelow, “High-Resolution tri-level process by downstream-microwave RF-biased etching”, SPIE vol. 1392 Advanced Techniques for Integrated Circuit Processing, (1990) pp. 180-184.
Gani Nicolas
Holland John
Todorow Valentin
Bach Joseph
Hassanzadeh P.
Moser, Patterson & Sheridan L.L.P.
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